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mithro | https://github.com/enjoy-digital/litex/pull/175/files | 00:10 |
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tpb | Title: Standardizing `cpu_variants` and adding lots of documentation by mithro · Pull Request #175 · enjoy-digital/litex · GitHub (at github.com) | 00:10 |
mithro | _florent__: ^ | 00:11 |
mithro | futarisIRCcloud: ^ | 00:11 |
futarisIRCcloud | Ok | 00:12 |
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futarisIRCcloud | _florent_ : https://github.com/enjoy-digital/linux-on-litex-vexriscv/commits/master looks good. | 09:32 |
tpb | Title: Commits · enjoy-digital/linux-on-litex-vexriscv · GitHub (at github.com) | 09:32 |
futarisIRCcloud | I couldn't figure out how the sbi and peripheral addresses are being set in that tree, though. Are the CSRs just being generated from the order of the definitions? | 09:34 |
futarisIRCcloud | CONFIG_SIFIVE_PLIC=y - Is Interrupt controller you mentioned (yesterday) actually compatible with the SIFIVE PLIC? | 09:44 |
futarisIRCcloud | https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c | 09:44 |
tpb | Title: linux/irq-sifive-plic.c at master · torvalds/linux · GitHub (at github.com) | 09:44 |
_florent__ | futarisIRCcloud: just for info, for now i was just trying to reproduce the spinal simulation in the litex environment | 09:46 |
futarisIRCcloud | https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf - sec 8 | 09:46 |
_florent__ | futarisIRCcloud: i don't think the SIFIVE_PLIC is really needed in buildroot for now | 09:46 |
futarisIRCcloud | Ahh, ok. I thought you were wiring it up the same way as renode / antmicro. | 09:47 |
_florent__ | no, here we are using the the last version on VexRiscv and just want to redo the process to understand things while doing it | 09:48 |
futarisIRCcloud | Ok. | 09:48 |
futarisIRCcloud | https://github.com/torvalds/linux/blob/master/drivers/tty/serial/earlycon-riscv-sbi.c | 10:10 |
tpb | Title: linux/earlycon-riscv-sbi.c at master · torvalds/linux · GitHub (at github.com) | 10:10 |
futarisIRCcloud | https://github.com/torvalds/linux/blob/master/drivers/tty/hvc/hvc_riscv_sbi.c | 10:10 |
tpb | Title: linux/hvc_riscv_sbi.c at master · torvalds/linux · GitHub (at github.com) | 10:10 |
futarisIRCcloud | https://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/sbi.h | 10:10 |
tpb | Title: linux/sbi.h at master · torvalds/linux · GitHub (at github.com) | 10:10 |
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