Saturday, 2019-04-27

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mithrohttps://github.com/enjoy-digital/litex/pull/175/files00:10
tpbTitle: Standardizing `cpu_variants` and adding lots of documentation by mithro · Pull Request #175 · enjoy-digital/litex · GitHub (at github.com)00:10
mithro_florent__: ^00:11
mithrofutarisIRCcloud: ^00:11
futarisIRCcloudOk00:12
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futarisIRCcloud_florent_ : https://github.com/enjoy-digital/linux-on-litex-vexriscv/commits/master looks good.09:32
tpbTitle: Commits · enjoy-digital/linux-on-litex-vexriscv · GitHub (at github.com)09:32
futarisIRCcloudI couldn't figure out how the sbi and peripheral addresses are being set in that tree, though. Are the CSRs just being generated from the order of the definitions?09:34
futarisIRCcloudCONFIG_SIFIVE_PLIC=y - Is Interrupt controller you mentioned (yesterday) actually compatible with the SIFIVE PLIC?09:44
futarisIRCcloudhttps://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-sifive-plic.c09:44
tpbTitle: linux/irq-sifive-plic.c at master · torvalds/linux · GitHub (at github.com)09:44
_florent__futarisIRCcloud: just for info, for now i was just trying to reproduce the spinal simulation in the litex environment09:46
futarisIRCcloudhttps://static.dev.sifive.com/U54-MC-RVCoreIP.pdf - sec 809:46
_florent__futarisIRCcloud: i don't think the SIFIVE_PLIC is really needed in buildroot for now09:46
futarisIRCcloudAhh, ok. I thought you were wiring it up the same way as renode / antmicro.09:47
_florent__no, here we are using the the last version on VexRiscv and just want to redo the process to understand things while doing it09:48
futarisIRCcloudOk.09:48
futarisIRCcloudhttps://github.com/torvalds/linux/blob/master/drivers/tty/serial/earlycon-riscv-sbi.c10:10
tpbTitle: linux/earlycon-riscv-sbi.c at master · torvalds/linux · GitHub (at github.com)10:10
futarisIRCcloudhttps://github.com/torvalds/linux/blob/master/drivers/tty/hvc/hvc_riscv_sbi.c10:10
tpbTitle: linux/hvc_riscv_sbi.c at master · torvalds/linux · GitHub (at github.com)10:10
futarisIRCcloudhttps://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/sbi.h10:10
tpbTitle: linux/sbi.h at master · torvalds/linux · GitHub (at github.com)10:10
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