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| xobs | Yeah, for some reason CSRs just aren't working for me. It's strange. | 06:47 |
|---|---|---|
| xobs | I have an SB_WARMBOOT primitive I've instanciated, and if I hard-write i_BOOT=1 then it reboots immediately, but if I set i_BOOT = self.ctrl.storage[0], then it never reboots when I set that bit. | 06:48 |
| xobs | Similarly, I have an RGB LED where I've set one color up to be self.ctrl.storage[2], and the LED doesn't change at all. | 06:49 |
| xobs | Which is strange, because I have a separate CSR that's doing bit-banged SPI, and that one is working just fine. | 06:50 |
| xobs | I get header files out, and I can recompile my code and patch the boot rom, but somehow I'm unable to control these hard macros. | 06:51 |
| xobs | Now I'm starting to suspect nextpnr is misbehaving. | 07:02 |
| xobs | Yes, that's weird. I have an "Instance" of an SB_RGBA_DRV that takes only constants. I have one PWD channel set to "1" and another set to "0", and still it has no output. | 07:50 |
| _florent_ | xobs: that seems strange, do you have more than 32 CSR regions on your design? if so, you need to increase the default csr_address_width | 08:04 |
| xobs | _florent_: I'm going down the rabbit hole now. I've cut the migen file down so it's just a single SB_RGBA_DRV block, and it's still failing. | 08:07 |
| xobs | But that's good to know about csr_address_width! | 08:08 |
| _florent_ | xobs: in fast i just remembered i added an assert for that: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc_core.py#L339 | 08:10 |
| tpb | Title: litex/soc_core.py at master · enjoy-digital/litex · GitHub (at github.com) | 08:10 |
| xobs | Okay, my fault. The RGB module has some Parameters that I assumed would default to "0" or "1", or some value when initialized. Turns out if you skip them, it defaults to "don't add this block". | 08:28 |
| xobs | So I can tell that CSRs are actually working, and now I have visual feedback of that with the LED block. | 08:29 |
| xobs | Now I need to figure out why SB_WARMBOOT isn't working. | 08:29 |
| _florent_ | ok thanks | 08:39 |
| xobs | Phew, finally figured it out. I'm disconnecting the USB prior to rebooting, but due to a bug in my code an interrupt storm happens immediately after disconnecting, so the CPU effectively halts. | 08:41 |
| xobs | So there were two different issues that were causing trouble. They're both solved now. Yay! | 08:41 |
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| keesj | I am back into plaing with litex.. | 12:30 |
| keesj | I think I need to userstand litescope and the serdes part. | 12:31 |
| keesj | right now I don't rember how to flash :/ https://pastebin.com/dqi9LEzJ | 12:32 |
| keesj | from litex.build.xilinx import VivadoProgrammer | 12:32 |
| tpb | Title: python test.py ****** Vivado v2017.4 (64-bit) **** SW Build 2086221 on Fr - Pastebin.com (at pastebin.com) | 12:32 |
| keesj | p = VivadoProgrammer() | 12:32 |
| keesj | p.load_bitstream("soc_ethernetsoc_arty/gateware/top.bit") | 12:32 |
| keesj | hmm it does program but gives a warning.. I also got the basic litescope working and try to understand it better | 15:01 |
| _florent_ | keesj: the warning always here with the VivadoProgrammer | 15:02 |
| keesj | I will also need to learn the flash | 15:12 |
| keesj | I have a lot to learn but hope I can combine the la with serdes. I think there is already an example here https://github.com/enjoy-digital/liteiclink/blob/master/examples/serwb/test/test_analyzer.py#L50 | 15:13 |
| tpb | Title: liteiclink/test_analyzer.py at master · enjoy-digital/liteiclink · GitHub (at github.com) | 15:13 |
| _florent_ | keesj: yes you can connect signals from the serdes to a litescope instance and see what is transmitted on your link | 15:20 |
| keesj | sounds.. easy | 16:09 |
| mithro | https://developers.google.com/season-of-docs/ | 21:09 |
| tpb | Title: Season of Docs | Google Developers (at developers.google.com) | 21:09 |
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