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| futarisIRCcloud | https://github.com/mattvenn/first-fpga-pcb | 21:23 |
|---|---|---|
| tpb | Title: GitHub - mattvenn/first-fpga-pcb (at github.com) | 21:23 |
| gurke_ | mithro: wouldn't it actually make more sense to swap verilog/blink-basic <-> verilog/blink-expanded in fomu-workshop? | 21:26 |
| gurke_ | mithro: (basic uses the PLL whereas expanded a simple divider) | 21:26 |
| gurke_ | mithro: I'm currently working on the migen example and could also fix this btw | 21:27 |
| mithro | gurke_: could be | 21:34 |
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| gurke_ | i'm playing around with migen... | 23:50 |
| gurke_ | and a basic counter | 23:50 |
| gurke_ | so if i have a 1 bit counter and i increment it with 1 in sync and connect it directly to one of fomu's touch pins, i get ~2 volts | 23:51 |
| gurke_ | for divided values (starting at 2), i get 3.2 volts | 23:52 |
| gurke_ | is this the reason, why the verilog example buffers the clock? | 23:52 |
| gurke_ | i.e. do i need some buffering for the stuff in sync? | 23:52 |
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