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| xobs | Does anyone here have a Mac? I'm looking for a precompiled version of dfu-util | 13:46 |
|---|---|---|
| xobs | I mean, precompiled versions of nextpnr-ice40 would be nice too. But one step at a time. | 13:47 |
| tnt | I guess a Mac running linux won't help you :p | 13:53 |
| xobs | Not so much. I was considering looking into cross-compiling to darwin, though. | 13:54 |
| tnt | for dfu-util that might work. nextpnr would be a pain with all the Qt/Python stuff. | 13:58 |
| xobs | I got the wishbone stuff to auto-build from Travis to a bunch of platforms, so I've got that covered: https://github.com/xobs/wishbone-utils/releases/tag/v0.1.4 | 13:59 |
| tpb | Title: Release Initial Release · xobs/wishbone-utils · GitHub (at github.com) | 13:59 |
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| MadHacker | xobs: Me. What do you need? | 14:16 |
| MadHacker | I have the ice40 toolchain running on it, and dfu-util etc. | 14:16 |
| MadHacker | I can just zip the lot up for you if you want. | 14:17 |
| xobs | MadHacker: I'm putting together a workshop, and I can produce binaries for building on Windows and Linux, but not on Mac. | 14:17 |
| xobs | That would be very helpful, thank you! | 14:18 |
| MadHacker | No worries, I'll do that. | 14:18 |
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| MadHacker | dfu-util is in brew, BTW. | 14:19 |
| auscompgeek | homebrew has a binary package for dfu-util if th-- | 14:19 |
| MadHacker | https://github.com/redbear/Duo/blob/master/docs/dfu-util_installation_guide.md <-- instructions here work. | 14:19 |
| tpb | Title: Duo/dfu-util_installation_guide.md at master · redbear/Duo · GitHub (at github.com) | 14:19 |
| xobs | homebrew has a binary package? That's interesting! I thought homebrew was just source packages. | 14:19 |
| auscompgeek | they have a buildbot which then inserts metadata for binary packages into their manifests | 14:20 |
| auscompgeek | they call the binary packages bottles, because of course they do | 14:20 |
| xobs | I knew dfu-util was there, but I thought homebrew was like macports or emerge, where it was a tool to download source files and build it locally. Hence the "brew" moniker. | 14:21 |
| MadHacker | It can do that, I think, but it's not the only mode. | 14:21 |
| auscompgeek | it originally only did that | 14:21 |
| MadHacker | ala apt-get. | 14:21 |
| MadHacker | OK, my icetools build tree is 691M. I don't think you want it. | 14:21 |
| auscompgeek | anyway, looks like they have bottles for mavericks through to mojave https://github.com/Homebrew/homebrew-core/blob/master/Formula/dfu-util.rb | 14:22 |
| MadHacker | I wonder if I can get it to install to another folder to package up? | 14:22 |
| tpb | Title: homebrew-core/dfu-util.rb at master · Homebrew/homebrew-core · GitHub (at github.com) | 14:22 |
| MadHacker | xobs: https://github.com/ddm/icetools knows how to build + install on OS X for a relatively all-in-one process, although it takes a while. | 14:23 |
| tpb | Title: GitHub - ddm/icetools: Open FPGA Toolchain by Clifford Wolf et al. (at github.com) | 14:23 |
| MadHacker | That gets you icestorm+yosys+iverilog+verilator but arachepnr instead of nextpnr. | 14:24 |
| xobs | I know there's https://github.com/esden/summon-fpga-tools by esden | 14:24 |
| tpb | Title: GitHub - esden/summon-fpga-tools: A simple script to build open-source FPGA tools. (at github.com) | 14:24 |
| xobs | Similarly, there's https://github.com/FPGAwars/toolchain-icestorm/releases but again no nextpnr | 14:25 |
| tpb | Title: Releases · FPGAwars/toolchain-icestorm · GitHub (at github.com) | 14:25 |
| MadHacker | I'll stick my tarball of doom up for you. | 14:25 |
| MadHacker | I don't know which bits to extract but I guess a quick make install will take care of actual install. | 14:25 |
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| MadHacker | (I basically have that icetools.sh package plus nextpnr) | 14:26 |
| xobs | That's very helpful, thank you! | 14:27 |
| MadHacker | Still much quicker than starting from scratch. :) | 14:27 |
| xobs | Right now the rough plan of the workshop is to divide it into 3 parts following a brief intro: Python, RISC-V, and low-level. Python is easy, since it just requires dfu-util to upload the .dfu file. | 14:28 |
| xobs | RISC-V gets a little bit fuzzier, but I have the SiFive RISC-V toolchain. | 14:28 |
| xobs | The HDL portion is a complete unknown at this point. | 14:28 |
| MadHacker | Sounds good, though. | 14:28 |
| xobs | Plus giving away reworked EVT1 boards. Everyone loves free hardware! | 14:29 |
| MadHacker | For myself, just blue-sky pondering here, I'd like to see how to mix the first two with custom hardwarey bits in HDL. | 14:29 |
| MadHacker | More than I'd be interested in "here's how to do HDL" in the abstract. | 14:29 |
| MadHacker | Guess that's a big ask for time for any sane workshop tho. | 14:30 |
| MadHacker | (I have no idea what the workshop is for, I'm not a participant, just putting the thought out there) | 14:30 |
| MadHacker | Everyone loves free hardware indeed. :D | 14:30 |
| xobs | MadHacker: That's a really good idea. And I wonder if I have enough time to introduce litex. | 14:30 |
| MadHacker | Waiting on this tarball transferring, I'll /msg you the url in a mo. | 14:31 |
| xobs | MadHacker: For the record, here's the elevator pitch for how you do that. | 14:31 |
| xobs | You create a CSRStorage() (for writing to hardware) or a CSRStatus() (for reading from hardware to the CPU), and then you assign signals to either csr.storage or csr.status. | 14:33 |
| xobs | Then litex will go about assigning it a memory-mapped address, and you can read/write to it in RAM. | 14:33 |
| xobs | See https://github.com/im-tomu/foboot/blob/master/hw/foboot-bitstream.py#L336 for how I did it with the ICE40 LEDD block | 14:33 |
| tpb | Title: foboot/foboot-bitstream.py at master · im-tomu/foboot · GitHub (at github.com) | 14:33 |
| MadHacker | OK, that sounds good. How about interrupts (or callbacks or similar)? | 14:33 |
| MadHacker | I can see how to use memory-mapped stuff for polling but no sane way to wake on it while doing other things. | 14:34 |
| xobs | Interrupts are, I believe, created by adding a csr_eventmanager. But that's a good point. I should read up on that. | 14:36 |
| xobs | What version of python3 does OS X have now? | 14:36 |
| MadHacker | None "natively". | 14:36 |
| MadHacker | 2.7 only. | 14:36 |
| MadHacker | Latest betas remove that too. | 14:36 |
| xobs | Ouch | 14:37 |
| MadHacker | For 3, it's python.org and 3.7.3 as you'd expect. | 14:37 |
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| auscompgeek | I guess macOS will now be the odd one out with no builtin python command | 14:50 |
| xobs | auscompgeek: yeah, but the Windows "python" command by default will just open a link to the Store. | 14:51 |
| xobs | Still, what a strange world we live in now. | 14:51 |
| MadHacker | And the OS X one was horribly horribly out of date, so this way it's at least going to be updatable rather than always having a "python" command pointing at a crappy old build. | 14:51 |
| xobs | Strange that the homebrew bottles are different for every major release of OS X> | 15:01 |
| MadHacker | Especially since it's not like binary compatibility isn't good between releases. | 15:01 |
| MadHacker | OS X is happy running some really rather old binaries, in general. | 15:01 |
| MadHacker | (although the next release drops 32-bit support, so maybe not for long) | 15:02 |
| xobs | pollo: I updated riscv-toolchain in the fomu repo so now it can build micropython. The name changed from riscv32-unknown-elf-gcc to riscv64-unknown-elf-gcc, so I'll need to update foboot as well. But I just tested, and it compiles. | 15:27 |
| pollo | Neat, I'll test that when I get back home from work | 15:28 |
| ovf | xobs: another prebuilt ice40 toolchain is https://github.com/FPGAwars/apio , but i have never used it (i see it also comes with arachnepnr instead of nextpnr) | 15:38 |
| tpb | Title: GitHub - FPGAwars/apio: Open source ecosystem for open FPGA boards (at github.com) | 15:38 |
| ovf | oh, you've already mentioned it | 15:39 |
| tnt | mithro: ping ? | 15:40 |
| xobs | ovf: they're missing nextpnr, instead favouring arachne. And I've had enough trouble with arachne's lack of timing-driven routing that I'd rather use the closed-source tools over arachne. | 15:40 |
| mithro | tnt: pong? | 15:43 |
| mithro | tnt: sheet of Fomu should be on the way | 15:45 |
| mithro | tnt: I was actually think about how your stuff and valentyusb could share USB integration tests on the plane back from Europe | 15:48 |
| tnt | mithro: yup, testing would definitely be an area where efforts could be shared and I definitely need to improve that ... my testbenches are ... huh ... mostly non-existent. | 15:49 |
| mithro | Have you used cocotb at all? | 15:50 |
| tnt | I did run the official USB spec testing suite, but that tests more the usb software stack compliance than anything else. | 15:50 |
| tnt | Nope, I only even learned of it recently. | 15:50 |
| xobs | actually, I have a no-cpu implementation that I've been meaing to test. | 15:51 |
| xobs | I did use some of your testbench, tnt, but having more of one would be very nice. | 15:51 |
| ovf | xobs: apparently there is an (older) toolchain with nextpnr? https://github.com/FPGAwars/toolchain-ice40/releases | 15:55 |
| tpb | Title: Releases · FPGAwars/toolchain-ice40 · GitHub (at github.com) | 15:55 |
| ovf | i'm sure at some point fpgawars and/or symbiflow will converge on a nice standalone toolchain | 15:56 |
| tnt | you really want something recent though for nextpnr ... | 15:56 |
| xobs | ovf: that's a very nice find! It's missing the HeAP placer, but it's the best there is so far. | 16:05 |
| tnt | xobs: do you know the githash it's based on ? | 16:07 |
| tnt | nextpnr-ice40 -V | 16:07 |
| xobs | tnt: cadbf42 | 16:08 |
| tnt | xobs: Most annoying thing I see is it doesn't support SB_SPI/SB_I2C. It also has a bug if you use shared clock_enable in/out clk on IOBs, that might build an invalid bistream. | 16:11 |
| tnt | the other bugs aren't really applicable to the up5k or can be worked around. | 16:13 |
| xobs | I'm realizing just how much boilerplate is required to get a basic Fomu hardware project running in litex :-/ | 17:10 |
| xobs | SPRAM, SPI flash, CPU, USB, clock... | 17:11 |
| ovf | looking forward to a "platinum" edition of fomu with a usb uart on board. :-P i don't think ft232rq would fit? | 17:15 |
| tnt | Don't think so ... | 17:16 |
| tnt | maybe a second ice40 :p | 17:17 |
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| emeb | lol | 17:42 |
| emeb | cue "beowulf cluster of ice40s" comment | 17:42 |
| xobs | It's looking like a dummy USB with no CPU weighs in at about 39% of the FPGA (2081 LCs) | 17:52 |
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| ovf | using a second (similar) computer for io is a popular practice, it seems. e.g. greenarrays' evaluation board comes with two ga144s talking to each other, one "host" (io) and the other "target" (whatever you actually want to run) | 17:57 |
| xobs | The C64 1541 disk drive had a second 6502 in it. | 17:58 |
| tnt | xobs: what about brams ? | 18:05 |
| xobs | tnt: 1 (i.e. 3%) | 18:06 |
| ovf | by the way, would usb3.1 dbc be any cheaper to implement than cdc-acm (if that's what foboot uses)? | 18:06 |
| xobs | ovf: I'm not familiar with dbc, but what do you mean by "cheaper"? | 18:07 |
| ovf | cheaper as in requiring fewer LoCs/LCs. but it looks like dbc still requires a pretty complete usb stack, so it probably wouldn't. | 18:15 |
| ovf | i think i imagined dbc being something like uart over usb data lines, which appears to be rather delusional. | 18:17 |
| xobs | cdc-acm is rather sane, except for the bit where it requires an endpoint that never actually gets used. | 18:22 |
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| xobs | Well cool. Probably has some room for improvement, but it enumerates, gives me the appropriate strings, and takes up 2111 LCs. And I can access the Wishbone bridge. | 18:35 |
| xobs | That includes PicoRVSPI as well. | 18:36 |
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| xobs | https://github.com/im-tomu/valentyusb/blob/master/valentyusb/usbcore/cpu/dummyusb.py | 18:57 |
| tpb | Title: valentyusb/dummyusb.py at master · im-tomu/valentyusb · GitHub (at github.com) | 18:57 |
| xobs | If you want to ensure your USB descriptors are perfect, try it on Windows. It's got to be the pickiest there is. Linux will allow most anything through. | 19:12 |
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| xobs | There. Fixed it so it enumerates on Windows. The LC count is up to 2240 now, but I'm sure my descriptor lookup mess could be improved. | 19:49 |
| xobs | And I removed picorvspi, and it's down to 1631 LCs. | 19:57 |
| tnt | lol | 19:58 |
| ovf | xobs: looks very neat! | 20:17 |
| xobs | And without the litex timer module, it's down to 1478. That's not too bad. | 20:17 |
| ovf | does litex bring much to the table in this case? i'm still exploring verilog, so i guess it hasn't yet annoyed me to the point of wanting a programmable generator beyond verilog's macro and module systems | 20:53 |
| xobs | ovf: in this configuration, no, litex brings nothing. it's all migen. | 20:54 |
| xobs | ovf: however, once you want to do anything extra, then yes, litex gives you a ton of functionality. | 20:55 |
| xobs | For example, if you want to monitor signals, you could connect them to a CSRStorage, and then read out the values via USB on the Wishbone bridge. | 20:55 |
| xobs | Or if you wanted something like ChipScope, you can add in litescope and get an internal logic analyzer. That works with any Signal(), even one that's in raw Verilog. | 20:56 |
| xobs | As an example, I expose the SB_WARMBOOT primitive as a CSR: https://github.com/im-tomu/foboot/blob/master/hw/foboot-bitstream.py#L381 | 20:57 |
| tpb | Title: foboot/foboot-bitstream.py at master · im-tomu/foboot · GitHub (at github.com) | 20:57 |
| xobs | So you could reboot the FPGA by writing 0xac to the CSR (Which, according to csr.h, is 0xe0006000) | 20:58 |
| ovf | i see. so in the SB_WARMBOOT case, migen/litex allow you to describe the register within your design, and later automatically generate the full register file from all such mentions. | 21:08 |
| xobs | Correct. Further down (https://github.com/im-tomu/foboot/blob/master/hw/foboot-bitstream.py#L430) you can see where we pull in picorv's spimemio.v directly and then wrap it around some CSRs. We also memory-map it so the hardware turns memory accesses into SPI flash accesses. | 21:10 |
| tpb | Title: foboot/foboot-bitstream.py at master · im-tomu/foboot · GitHub (at github.com) | 21:10 |
| tnt | xobs: yup that's definitely pretty good. | 21:16 |
| ovf | oh, and the cpu core is actually scala/spinalhdl. for some reason i thought this would be python all the way down. fun. | 21:21 |
| xobs | vexriscv is scala/spinalhdl, yes. There's the minerva core which is Python-based, but I'm not sure what its status is. | 21:22 |
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| futarisIRCcloud | xobs: Thanks for the link. I added a slide about rgb leds in micropython to the presentation, with that... | 22:03 |
| xobs | futarisIRCcloud: I'm still not sure if I'll have time to add HID support to micropython. It ought to be possible without any gateware changes, though. | 22:04 |
| xobs | When is your presentation? | 22:10 |
| futarisIRCcloud | xobs: Tomorrow at 2:40pm AEST. I think I'm already very close to filling up 10 minutes ... I don't think I'll have time to present anything extra, unless it is in the networking sessions after. | 22:12 |
| futarisIRCcloud | Hopefully this will drum up some interest for PyCon AU and the hackfest before lca2020. | 22:12 |
| xobs | Okay, then I'll focus on my workshop. It's almost finished. If completely untested. | 22:14 |
| futarisIRCcloud | Cool. | 22:15 |
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