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| xobs | AmosSam_: have you used https://www.silabs.com/documents/public/reference-manuals/EFM32HG-RM.pdf | 00:58 |
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| futarisIRCcloud | xobs: I've used STM32L1 series. Similar market to that EFM32HG, but have a Cortex-M3 instead... | 01:17 |
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| mithro | MadHacker: The edge-tpu is in the 100mW -> 4W space, the iCE40 should be in the <20mW space | 02:04 |
| mithro | MadHacker: https://github.com/SymbioticEDA/MARLANN | 02:04 |
| tpb | Title: GitHub - SymbioticEDA/MARLANN: Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks (at github.com) | 02:04 |
| mithro | xobs: Sounds like you have a testcase which causes the duplicate byte issue? | 02:05 |
| xobs | mithro: I do, so now I'm working on getting the bitstuffer working. | 02:05 |
| mithro | Hrm? | 02:05 |
| mithro | xobs: What do you mean by "getting the bitstuff working" - you mean make the tests pass? | 02:06 |
| xobs | Yeah, trying to make the tests pass and fix the testcase I found. | 02:07 |
| xobs | mithro: I'm starting to understand what you mean by "the tests are broken". The testcases I found don't work in the testbench, but they don't work in different ways. I.e. the testcase is "[0xa5, 0xe1, 0x7e]", but the testbench sees "[0xa5, 0x87, 0x7e]" and real hardware sees "[0xa5 0xc1 0xfd 0xfd]". | 05:09 |
| mithro | xobs: what is the "correct" answer | 05:12 |
| xobs | [0xa5, 0xe1, 0x7e] | 05:12 |
| mithro | Btw all the high level tests were working | 05:13 |
| mithro | Is this with your valid change? | 05:13 |
| xobs | No, I backed that change out. | 05:14 |
| mithro | Okay | 05:14 |
| mithro | I'll be back at a computer in like 20mins | 05:14 |
| mithro | How's the software side going? | 05:15 |
| xobs | I haven't worked on the software side, since I want to get the hardware working first. | 05:16 |
| xobs | Also, "unifio_test.py" fails all 20 tests on your usb12 branch. Is that one of the ones that's supposed to pass? | 05:17 |
| mithro | Can't remember, but I think it use to | 05:18 |
| mithro | Back at a computer now | 05:25 |
| xobs | Welcome back | 05:25 |
| mithro | What is the status of "python -m valentyusb.usbcore.cpu.epfifo_test -v" | 05:33 |
| xobs | Running it now... | 05:34 |
| mithro | So far it mostly seems to be passing for me... | 05:37 |
| mithro | It is *rather* slow however... | 05:37 |
| xobs | Still running for me, too. But I think it's passing. | 05:43 |
| mithro | xobs: python -m valentyusb.usbcore.rx.pipeline_test -v | 05:56 |
| xobs | mithro: still running the first set of tests | 05:56 |
| mithro | xobs: Open a new terminal and run another one :-P | 05:56 |
| xobs | Ran 1 test in 34.613s | 05:58 |
| xobs | Once this test is finished, I'm going to see if I can spot these defective SOF frames in the vcd files. | 06:02 |
| xobs | Okay, good. That finished (3022s) without errors. Now I'm going to do that SOF test. | 06:29 |
| xobs | mithro: The test I added at https://github.com/xobs/valentyusb/commit/8347ac8d25118a560ab1e4714df39f583d66f8a8 has some strange values in the vcd files. For example, I do self.send_sof_packet(150) which should send [0xa5, 0x12, 0xc5], but the vcd files shows usb_core_rx_o_data_payload[] as being [0xa5, 0x12, 0xd8] | 06:40 |
| tpb | Title: usbcore: test: add sof packet test · xobs/valentyusb@8347ac8 · GitHub (at github.com) | 06:40 |
| xobs | That's funny. If I make the last byte of an SOF "0x55", then it works. | 06:52 |
| mithro | xobs: I'm afraid I've run out of steam today | 07:33 |
| mithro | Woke up way to early this morning and also got new glasses which are taking a while to get use too.... | 07:33 |
| xobs | mithro: No worries. I've gotten distracted looking at the CRC5 stuff, which I think is the source of the problems in the VCD files. | 07:34 |
| mithro | xobs: Oh? | 07:34 |
| xobs | Yeah, if I import crc5_sof and use it directly, I get values that differ from what I'm seeing in the LA. | 07:35 |
| xobs | For example, hex(crc5_sof(213)) yields 0x1b, but in the Beagle LA it shows the CRC should be 0x16. | 07:35 |
| mithro | xobs: BTW This commit looks very suspect -> https://github.com/mithro/valentyusb/commit/28311625e914b87921ea3e06a27cb36835b31aae | 07:35 |
| tpb | Title: What is this for? · mithro/valentyusb@2831162 · GitHub (at github.com) | 07:35 |
| mithro | xobs: Unrelated to your crc5 issue... | 07:36 |
| mithro | https://github.com/mithro/valentyusb/blob/usb12/valentyusb/usbcore/utils/packet.py#L70-L79 | 07:36 |
| tpb | Title: valentyusb/packet.py at usb12 · mithro/valentyusb · GitHub (at github.com) | 07:36 |
| mithro | xobs: I'd play with some doctests there | 07:37 |
| xobs | I'm not sure what a doctest is, but I'm trying to come up with a known-good crc5 implementation that I can use to compare those comments with what they should be. | 07:38 |
| mithro | xobs: python -m valentyusb.usbcore.utils.packet -v | 07:38 |
| mithro | xobs: See those comments at the top of each function are actual tests you can run -> https://github.com/mithro/valentyusb/blob/usb12/valentyusb/usbcore/utils/packet.py#L72-L75 | 07:38 |
| tpb | Title: valentyusb/packet.py at usb12 · mithro/valentyusb · GitHub (at github.com) | 07:38 |
| mithro | https://www.python-course.eu/python3_tests.php | 07:39 |
| tpb | Title: Python Tutorial: Tests, DocTests, UnitTests (at www.python-course.eu) | 07:39 |
| mithro | https://pymotw.com/3/doctest/ | 07:39 |
| tpb | Title: doctest — Testing Through Documentation PyMOTW 3 (at pymotw.com) | 07:39 |
| mithro | http://pythontesting.net/framework/doctest/doctest-introduction/ | 07:39 |
| tpb | Title: doctest introduction - Python Testing (at pythontesting.net) | 07:40 |
| mithro | https://en.wikipedia.org/wiki/Doctest :-P | 07:40 |
| tpb | Title: doctest - Wikipedia (at en.wikipedia.org) | 07:40 |
| mithro | xobs: IE I'm too lazy to write both documentation and tests for functions like that at the same time :-P | 07:40 |
| xobs | I see. | 07:40 |
| xobs | 8 failures. | 07:40 |
| xobs | Wait, 5 of those were me breaking things. 3 failures. | 07:41 |
| mithro | xobs: be careful of endian issues | 08:51 |
| mithro | xobs: MSB verse LSB has bitten me multiple times here | 08:51 |
| xobs | mithro: I'm running into that a lot. So difficult. | 08:52 |
| mithro | It's why I spent ages working on the pprint module | 08:52 |
| mithro | Really should have spent the effort on doing a bits type | 08:54 |
| mithro | I think there are like ~3 half arsed efforts in ValentyUSB :-P | 08:55 |
| mithro | Well, I'm probably going to call it an early night | 08:57 |
| xobs | I'm just trying all possibilities. | 08:59 |
| xobs | Goodnight! | 08:59 |
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| xobs | Such a fuzzy yak. | 11:13 |
| xobs | USB is reverse-endian, which I guess kinda makes sense for a wire protocol. So it writes binary 1 as "0b10000" | 11:14 |
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| futarisIRCcloud | Endianness usually refers to the byte order. Least significant bit first. Ethernet and RS-232 are the same order. | 11:29 |
| MadHacker | Actually, USB's the odd one out here then. That's little-endian. | 12:09 |
| xobs | As usual, though, 4 hours of work that boils down to a two-line patch. | 12:12 |
| MadHacker | Yup. :/ | 12:14 |
| MadHacker | Ah well. Could be worse. VAX bi-endian is no longer a thing. | 12:14 |
| MadHacker | Or, well, middle-endian really. | 12:14 |
| xobs | Neither is Cray, which I seem to recall was also mixed. | 12:15 |
| MadHacker | No more NUXI problem. | 12:15 |
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