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| singham | Does anyone know the details about file formats gdsii, oasis and edif? | 06:17 |
|---|---|---|
| singham | gdsii is open and not free | 06:17 |
| singham | When it is said not free, what do they mean? | 06:17 |
| singham | And what's the role of edif format's open and free status? | 06:18 |
| singham | The pdfs of edif are paid | 06:18 |
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| singham | ? | 08:39 |
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| gatecat | so-offish: I didn't know Yosys supported these hot comment type attributes at all.... but this should work fine with a Verilog2001 style one | 13:09 |
| gatecat | localparam _STYLE = (STYLE == "") ? "block_ram" : STYLE; | 13:09 |
| gatecat | (* syn_ramstyle = _STYLE *) reg [WIDTH-1:0] ram [0:SIZE-1]; | 13:09 |
| tnt | Oh wow, that works ? | 13:12 |
| gatecat | unless something goes wrong with string processing, I think so | 13:15 |
| gatecat | I did this before fine `(* keep, BEL=$sformatf("X%dY%d.FAB2RAM_A1", x, y0) *)` | 13:15 |
| gatecat | (x and y0 are localparams) | 13:16 |
| tnt | Oh that's nice, I always had to resource to tricks to get the BEL attribute programmatically set. Good to know it's actually possible ! | 13:16 |
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| so-offish | gatecat: I'll do it that way; it fits better with the "vibe" of the tool anyway | 17:48 |
| so-offish | Speaking of vibes: how is everyone configuring their EHXPLLL? An MMCM on Xilinx parts is easy: set multipliers, dividers, done... | 18:03 |
| so-offish | There is a PLL tool in prjtrellis/libtrellis/tools | 18:21 |
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| so-offish | and if you use it from the command line, it gives you SOME output... but if you tell it to output to a file? It gives you a whole module! | 18:33 |
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