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| ikskuh | heya o/ | 11:06 |
|---|---|---|
| ikskuh | still hacking around with yosys/verilog and i'm wondering: how can i include a initialization for a ROM? | 11:06 |
| ikskuh | should i just add a huge case() with all options? that doesn't really sound smort | 11:07 |
| tnt | google $readmemh | 11:08 |
| ikskuh | thx :) | 11:08 |
| ikskuh | i kinda assumed readmemh would only run during simulation | 11:09 |
| ikskuh | and not for synthesis | 11:09 |
| tnt | it works in synthesis (as long as it's done in a `initial` block of course, can't start doing it "dynamically" ...) | 11:10 |
| ikskuh | well, that's obvious :D | 11:10 |
| ikskuh | but perfect, thanks :) | 11:11 |
| ikskuh | font rom, here i come! | 11:11 |
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