Thursday, 2021-10-14

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* Sarayan waves05:55
SarayanI have a module that I put in techlibs/intel_alm/cyclonev/cells_sim.v, called cyclonev_hps_interface_mpu_general_purpose, that is a dual latch with the hps.  IOW, it has intrinsic side effects.  How can I tell yosys not to remove it when it is instanciated, even if the top module has no external pins?06:00
Sarayan(because the top module only plays wiht the signals to/from the gp module)06:00
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gatecatSarayan: the `(* keep *)` attribute is probably what you want07:39
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Sarayan   Number of cells:                  112:56
Sarayan     cyclonev_hps_interface_mpu_general_purpose      112:56
Sarayanyay12:56
Sarayannow to make nextpnr accept it12:56
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