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| cr1901 | gatecat: Ya know, I never gave this much thought... what does "CIB" stand for in Lattice land if you know | 11:32 |
|---|---|---|
| cr1901 | I keep thinking "Cartridge In Box", but that's the wrong domain | 11:32 |
| gatecat | Configurable Interconnect Block, iirc | 11:33 |
| cr1901 | Thanks, couldn't think of a good acronym expansion | 11:33 |
| gatecat | Configurable Interface Block in fact | 11:33 |
| gatecat | https://www.latticesemi.com/-/media/LatticeSemi/Documents/WhitePapers/AG/DeliveringFPGA-BasedPre-engineeredIPUsingStructuredASICTechnology.ashx?document_id=18925 | 11:33 |
| cr1901 | tyvm, now I can stop pretending that Lattice is a used game seller | 11:34 |
| cr1901 | Also, it's “Complete In Box”. Oops ._. | 11:34 |
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| anuejn | is there a yosys pass or an external tool, that gives a more compact overview over the design usage than `stat` | 17:00 |
| anuejn | maybe also graphical like qdirstat? | 17:00 |
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| lofty | anuejn: stat is about as compact as it gets | 19:11 |
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| anuejn | thanks :) | 22:15 |
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