Thursday, 2019-08-01

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kergadonI have a question about nextpnr is this the right place to ask?09:37
kergadonSo this is probably a hilarious level of overkill for the task but I was thinking about trying to adapt nextpnr to route belts in factorio. Would it work to write a custom architecture to accomplish this largely useless task?09:46
daveshahkergadon: for this kind of small, simple system, the Python-described generic architecture is probably better than a full custom arch09:47
tpbTitle: nextpnr/ at master · YosysHQ/nextpnr · GitHub (at
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daveshahThere's an example here - although you could probably skip the packing parts if your netlist isn't LUTs in the first place09:48
tpbTitle: nextpnr/generic/examples at master · YosysHQ/nextpnr · GitHub (at
ZirconiumXAnd here I was thinking targeting Yosys for 7400 logic would be a stretch09:49
kergadonI wanted to try to do the most ridiculous factorio centered project I could think of.09:51
kergadonThis all started when I started exploring the math behind the more complex belt balancers.09:51
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kergadondaveshah, thanks09:55
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zignigtinyprog -b12:37
zignigoops :) , wrong window12:37
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ZipCPUzignig:  I do it all the time ;)13:06
zignigjust reading your entry on skid buffers , very interesting.13:18
zignigI might give a nMigen version a go.13:18
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ZipCPUzignig: Wow, those two really follow one another ... ;D13:38
zignigbeen noodling with nmigen for a while , looking for constructs to try. ;)13:48
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pepijndevosWhoa... factorio place and route... that's pretty funny14:07
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