Sunday, 2019-07-07

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ZirconiumXHuh, this is interesting: the Cyclone 10 GX ALM strongly resembles the Cyclone V ALM, and the Cyclone 10 LP ALM strongly resembles the Cyclone IV ALM12:10
ZirconiumXThis is useful information12:10
daveshahCyclone 10 is just a rebranded Cyclone IV12:15
daveshahwhich is just a die shrink of the Cyclone III12:15
daveshahNot even sure if the JTAG IDs changed12:15
ZirconiumXThe LP seems like it12:16
ZirconiumXBut the ALM is different between the GX and LP12:16
daveshahAh yes, meant LP12:16
daveshahGX may well just be a V though12:16
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ZirconiumXIt does appear to be a V12:17
daveshahIntel are too lazy to update the JTAG IDs so it's usually pretty obvious12:17
daveshahFrom memory of playing with the Cyclone III, the Quartus programmer actually asks you which device you have12:18
daveshahMost other companies (Lattice certainly) put the IDCODE in efuse/otp so they can do binning after production testing12:18
ZirconiumXSo, it seems the Intel range is architecturally split into IV/10LP/MAX10 and V/10GX12:19
ZirconiumXWhich is useful from a coding standpoint12:20
ZirconiumXSince Project Chibi documents the MAX10 (not very well >.>), that information should translate to the other two12:20
daveshahThere will doubtless be some equivalences to Stratix/Arrias too12:22
daveshahNo FPGA company has *that* many different arches...12:22
daveshahChibi documents the MAX V iirc12:23
ZirconiumXAh, yes12:23
ZirconiumXThe MAX V seems to be related to the IV LE12:24
ZirconiumXBut the flop is more advanced, it appears12:25
ZirconiumXThe MAX V LE appears to be from a Cyclone I?12:32
daveshahYes, I think rqou mentioned something like that at the time12:32
ZirconiumXThis handbook refers to it as just "Cyclone", so yeah12:32
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