Tuesday, 2019-06-25

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promachHow much RAM does building nextpnr require ? 8GB RAM plus 5GB swap also fail to build02:15
cr1901_modernAt least 2GB IME, and even then on -j1 you will go to swap02:23
cr1901_modernIt's a pity, can't build on my ARM SBCs, and the Pinebook takes hours02:24
promachI already had 8GB RAM02:25
cr1901_modernI assume you're building -j$NPROC02:25
cr1901_modernif you're building w/ -j1, then WOW ._.02:25
promachcr1901_modern : how long does it take for -j$NPROC ? and only use 2GB ?02:30
cr1901_modernIf you use -j1, you can do it in 2GB of RAM and 2GB of swap02:31
cr1901_modernI have no idea how much -j$NPROC takes, but 8GB RAM seems extremely high02:31
promach-j$NPROC should use less time and RAM, I suppose ?02:33
cr1901_modernLess time, more RAM02:33
cr1901_modernnevermind, I don't know what the problem is02:34
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pepijndevos_Are there any public liberty files I can look at as a reference?17:39
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corecodewhat do you mean by liberty files?18:00
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pepijndevos_corecode, a library that describes asic logic cells18:04
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pepijndevos_Warning: Found unsupported expression 'D*C' in pin attribute of cell '74AC575_8x1DFFR' - skipping.19:23
pepijndevos_Doesn't seem like Yosys supports synchronous reset flip-flops?19:24
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ZirconiumXPossibly one for daveshah: you can use `sat` to prove two netlists are equivalent, right?19:37
ZirconiumXI don't think netlist is at all the right term; I mean "an internally represented ILANG design"19:38
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pepijndevos_lol, for the pwm benchmark, almost all of the chips are used to say x>y19:44
ZirconiumXpepijndevos_: I made a pass to convert chips into 7485s19:45
ZirconiumX*convert comparison chips19:45
ZirconiumXIt was marginally worse for me, but I can commit it if you want19:46
ZirconiumXHmm, I wonder if it's better to use 7485s for variable comparisons and let ABC handle comparison to a constant19:47
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ZirconiumXpepijndevos_: do you mind conducting an experiment for me?19:49
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pepijndevos_ZirconiumX, not at all19:59
pepijndevos_What do you think about adding a 74181, maybe as an $alu thingy?20:01
pepijndevos_* as long as your experiment allows me to go to bed before 1120:01
ZirconiumXCan you quickly scratch up a 32 bit comparison module between two variables, a variable and zero, and a variable and some random binary number?20:01
ZirconiumXAnd then `synth` them20:01
ZirconiumXHere's my hunch: comparison with zero will be smallest, then the comparison with the random number, and then the variable comparison20:02
pepijndevos_I'll try. My verilog skills are basically non-existant. (learned VHDL in uni)20:02
ZirconiumXpepijndevos_: nak on including a 74181 as an $alu cell; the inputs of the $alu cell are very different to what the 74181 expects20:04
ZirconiumXBut you could include the various functions as liberty cells20:04
ZirconiumXThe 74182 should make a good $lcu though20:04
pepijndevos_I thought liberty cells did not works for more than one output20:05
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pepijndevos_But yea, was thinking if we could complement the $add techpass with some other arithemitic.20:06
ZirconiumXAh, good point20:06
ZirconiumXThe 74181 would be wonderful20:06
ZirconiumX*but* it's also difficult to obtain20:06
ZirconiumXWhich was why I picked a 28320:07
pepijndevos_oh... did not know that20:07
pepijndevos_what's a $lcu?20:07
pepijndevos_The manual just has a fixme20:07
ZirconiumXLookahead carry unit20:08
ZirconiumXThe 283 is (usually?) a carry-skip adder, but an adder with an LCU is far superior20:09
pepijndevos_Would it make sense to implement $sub with a quad inverter and carry in tied high?20:10
ZirconiumXThe '181 has /P and /G specifically to integrate with a '18220:10
ZirconiumXI'm reasonably sure Yosys knows how to do that already20:10
pepijndevos_Hmm, so far subtraction generated a bunch of xor stuff for me20:11
ZirconiumXHmm, okay20:11
ZirconiumXIn that case, sure20:11
pepijndevos_Eh... I'll get back to your compare test. Maybe I'll make an issue to collect ALU thoughts.20:12
ZirconiumXSure thing20:13
pepijndevos_So... 0 is actually smaller than the particular random number I picked20:15
pepijndevos_But with a variable is many times bigger20:15
pepijndevos_for any number 60-70, for the variable 196.20:16
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corecodethe gigatron does alu with mux chips20:25
corecodeit's a mind bender20:25
pepijndevos_Yea, I remember in the video they explained their ALU uses 6 chips, but they did not go into details20:29
pepijndevos_Because it'd be a whole seperate video I guess...20:29
corecodeyea i just stared at the schematic until it made sense20:34
pepijndevos_I wonder if maybe $sub -> $add+inv is maybe just some pass/parameter we're missing...20:34
pepijndevos_corecode, IIRC it was based on another thing... maybe there is an article out there that explains it... or I need to find some time to stare at the schematic too.20:35
pepijndevos_Is it *just* muxes?20:35
corecodeand one adder, i think20:36
corecodeor two?20:36
ZirconiumXpepijndevos_: It's not all that complex20:42
ZirconiumXThe ALU of the Gigatron is essentially F(A) + F(B)20:43
ZirconiumXSorry, Fa(A, B) + Fb(A, B)20:43
ZirconiumXWhere Fa and Fb are 4-bit LUTs20:46
ZirconiumXimplemented as 74153s20:46
ZirconiumXSo addition is Fa(A, B) = A, and Fb(A, B) = B20:47
ZirconiumXsubtraction is Fa(A, B) = A, Fb(A, B) = ~B and the carry-in is set high20:47
ZirconiumXAnd for most boolean logic, e.g. AND: Fa(A, B) = A & B, Fb(A, B) = 020:48
ZirconiumXcorecode: ^20:48
ZirconiumXSo, you *could* implement an ALU in terms of muxes and addition20:49
ZirconiumXHowever, it quickly grows a bit inefficient20:49
ZirconiumXBecause you need N 74153s and N/4 74283s20:50
ZirconiumXFor an N-bit ALU20:50
ZirconiumXIt's more flexible than a '181/'182 set up, but also bigger20:52
pepijndevos_So how did the gigatron get away with 6 chips for its ALU (IIRC)?20:53
ZirconiumXpepijndevos_: They didn't; https://cdn.hackaday.io/files/20781889094304/Schematics.pdf page 6 shows they use 10 ICs for the ALU21:00
ZirconiumXIt's an 8-bit ALU, so 8 74153s plus 8/4 = 2 74283s21:00
pepijndevos_IRI (I recalled incorrectly)21:02
ZirconiumXThe genius of the design comes to one Dieter Muller, AKA ttlworks21:03
ZirconiumXWho basically *wrote the book* on 74 series logic21:03
tpbTitle: PAL16L8 (at www.6502.org)21:04
pepijndevos_There is a book?? I need this21:04
pepijndevos_for reasons21:04
ZirconiumXAnd more generally: http://www.6502.org/users/dieter/index.htm21:05
tpbTitle: TAF (at www.6502.org)21:05
pepijndevos_Too sleepy. Will look tomorrow. After... ahem, studying for the oral exam thursday heh21:07
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