Saturday, 2019-05-11

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bwidawskZipCPU› I actually have been trying with the lattice programmer, and no joy - which was why I wanted to try the open tools :-)01:23
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ZipCPUchaseemory: ;)02:34
ZipCPUbwidawsk: You mean the iCE40 1k stick?02:34
* ZipCPU just finished showing 101 Dalmations to his kids02:35
* ZipCPU googles ECP5 evaluation board02:55
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bwidawskZipCPU› no, the ECP5 EVN03:12
* ZipCPU googles the ECP5 evaluation board03:12
ZipCPULooks like it has a QSPI flash on board, no?03:12
bwidawskwhat's the 'Q'?03:12
bwidawskmine has a macronix part03:13
bwidawsk16pin SPI03:13
ZipCPU"Quad" SPI.  It takes the MISO/MOSI/WP and HOLD pins and turns them all into bidirectional data03:13
ZipCPUOh, 16pin SPI?03:13
bwidawskwell, spi is 1 pin, but the actual chip is 1603:13
* ZipCPU googles some more03:14
ZipCPUOut of curiosity, what are your goals with the flash?  Just initial startup configuration?03:15
bwidawskoh, I didn't notice the special programming instructions03:15
bwidawskso at this point, I'm just trying to compare open vs. proprietary tools03:15
ZipCPUThe data sheet I'm looking at, FPGA-EB-02017-1-0-ECCP5-Evaluation-Board.pdf shows a QSPI flash, with all the standard pins03:16
bwidawskyou have a link for that one handy?03:16
ZipCPUSure, one moment03:17
ZipCPUI found it on this page:
tpbTitle: ECP5 Evaluation Board - Lattice Semiconductor (at
ZipCPUI'm looking at the user guide,
ZipCPU... and I'm on page 2503:17
bwidawskZipCPU› hmm, maybe the other pins are grounded03:18
ZipCPUIf you look at page 39, it shows a 16 pin flash, of which only 6 are used03:19
ZipCPUSome are grounded, some are test points03:19
bwidawskyeah, okay, I hadn't dug that deeply03:19
ZipCPUI've written about how to build a QSPI flash controller that's highly configurable, yet very low logic03:19
ZipCPUThe basic approach works nicely for dual SPI as well (strapped MISO+MOSI together for bidirectional data lines)03:20
ZipCPUWhile I have a regular SPI flash controller, it's not quite so configurable03:20
bwidawskso... I was under the impression that I can program this flash with jtag, and then on subsequent boot, the bitstream would be loaded into the fpga?03:20
ZipCPUYeah, that's usually how this sort of thing works.  I usually load my design via JTAG, and the program the flash through the design, but I'm probably just strange that way03:21
ZipCPU*then program03:22
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bwidawskwell, if you know what you're doing, that's probably much faster03:50
bwidawskI'm not sure if I need any straps, or something set to make it load from the SPI, but nothing seems to work for me03:51
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bwidawskfor whatever it's worth, I spent 3 days struggling with diamond and flexlm to get the blinky to work, and symbiflow/trellis worked within 30 seconds04:32
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