Thursday, 2019-03-28

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janrinzeanyone here who has been working with the upduino v2?12:03
janrinzereading and writing flash seems to be unreliable. I wonder if it is related to the pcb.12:04
tntjanrinze: wouldn't be surprising12:40
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ZipCPUjanrinze: Which flash chip?  And what SCK speed?14:06
janrinzeZipCPU: the flash chip of the upduino v2 (config for up5k)14:12
janrinzeZipCPU: uploading with iceprog is not quite stable (3MHz according to the doc of iceprog)14:13
janrinzeZipCPU: also my bootloader tries to load at 12Mhz from the same flash14:14
janrinzeZipCPU: same design runs flawless on Lattice up5k evaluation board14:14
janrinzeZipCPU: there is a different FTDI chip used on the upduino v2 which might be holding the pins busy14:15
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ZipCPUjanrinze: The flash connected to the FTDI, or to the FPGA?14:26
ZipCPUIf the FPGA, it looks like the 25Q32 flash from Winbond14:34
daveshahI heard that the Upduinos were using recycled flash - someone found one with Cisco strings programmed into it14:35
ZipCPUjanrinze: Are you able to configure the FPGA with no problems, and only struggling to configure the flash?14:37
ZipCPUDid you notice the required change to the circuit board, as noted on the schematic, necessary to program the flash?14:38
janrinzeZipCPU: not aware of any required changes14:42
ZipCPUCheck the notes on the schematic then14:42
janrinzeZipCPU: do you mean the shunts for flash vs ice ?14:43
janrinzethose are the default for programming flash, right?14:43
ZipCPUI'm not sure.  I don't understand what they are there for.14:44
janrinzeThere is an option to program the up5k internal flash14:44
janrinzeisn't that OTP?14:45
ZipCPUNot sure.  I didn't realize that the iCE40 had an internal flash.14:45
ZipCPUdaveshah: Would you know anything about that?14:45
janrinzeconfiguring the FPGA sometimes fails using iceprog.14:46
janrinzeOften iceprog hangs after erasing14:47
ZipCPUHmm ... let me check the source of iceprog14:49
tntThe fpga has an internal flash (OTP), iceprog can't program that.  But iceprog can do direct sram loading of the fpga.14:53
ZipCPUjanrinze: I'm not seeing anything stand out, but I know that following an erase the protocol says you are to wait until the erase is complete before continuing15:04
ZipCPUThe erase is accomplished within a "flash_wait()" call inside  Perhaps some careful printf's placed in there will help you track down what's going on?15:05
janrinzeI wonder if the ftdi chip is the cause here.15:07
tntjanrinze: you said "unreliable" ... that kind of implied it works sometimes ?15:07
janrinzetnt: yes it works about 50% of the time15:07
janrinzetnt: on the lattice up5k evaluation board thee are no issues with iceprog15:08
tntyeah I don't have any issues iwht iceprog on the icebreaker either.15:09
emebI use iceprog with a lattice ultra eval board and dupont wires flying over to my own hardware for programming flash. It works fine even with horrible wiring.15:17
emebI have had issues with FTDI parts doing weird stuff though. I bought one of those FTDI mini breakouts and for some reason it's gone bad - worked OK for a couple years then a few weeks back started failing. Enumerates with the wrong chip number, won't actually do I/O, etc.15:19
janrinzewill attach a separate flash chip and see if i can read that from some other pins.15:20
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janrinzeoh.. what to use to program the external flash?15:24
janrinzeusbasp has miso/mosi so should be able to do this, right?15:44
emebIt might be physically capable of doing it, but the question is if there is software support.15:55
emebusbasp seems targeted at programming AVR processors15:56
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janrinzeemeb: true that.. i havea tl866 here too so going to try that one now17:54
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