Thursday, 2019-02-28

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promachcorecode : is your usb verilog code posted in github repo ?04:06
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jayauraHi, icebox_stat can list how many resources were used, but can some tool list whats the maximum available resources for the fpga the design was compiled for ?06:54
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corecodepromach: i don't have usb verilog code10:12
corecodejayaura: you mean what the model has resources?10:12
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jayauracorecode: yes, like giving the resource summary as "GBUF: 8 of 8" instead of "GBUF: 8" as I see now10:14
corecodei guess you could modify the code10:14
jayauraI mentioned gbuf figuratively.10:15
jayaurai mean, the toolchain already know what resouces the fpga part contains. why not just say it :P10:15
corecodebecause you didn't change the code yet10:15
jayaurais that necessary? when I do a clean build, shouldnt it report the used and available resources?10:16
corecodewhat do you mean by clean build10:17
daveshahBoth arachne-pnr and nextpnr will print both resource usage and total available during pnr10:23
jayauraAh sorry my mistake. I needed to look inbetween. I was looking at the end. arachne-pnr was only reporting span4 and span12 at the end, and not the LCs statistics, which was summarized right after placement10:57
promachcorecode : wait, I thought you said coded something on usb ?11:03
corecodeyes, for microcontrollers11:05
promachso, the code is not in verilog ?11:05
corecodeno, it's code, not design11:10
promachcorecode : I do not get you11:17
promachI remembered you said you coded something on usb ?11:18
promach"it's code, not design" ??11:18
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corecodeyes, code12:07
corecodefor a microcontroller12:08
corecodeno hdl12:08
promachc ?12:08
promachI really do not want to deal with the usb linux driver c code12:09
promachthat is so ugly to debug if you really need to (which I think is bug-free)12:09
corecodewhat is bug free?12:09
promachfree of bugs12:09
corecodewhat is bug free12:09
promachlike receiving the wrong data from the usb protocol12:10
promachwhich is impossible at all12:10
promachgiven that usb had evolved so far12:10
corecodewhat are you talking about12:10
promachI am talking about libusb12:10
tpbTitle: Home · libusb/libusb Wiki · GitHub (at
promachc code is much more difficult to debug compared to verilog code12:11
promachI might be wrong, but it is just personal experience12:12
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MoeIcenowyicebox_vlog cannot deal with UP IP?14:40
MoeIcenowyI tried to use it to generate a verilog for UPduino RGB blink sample14:40
MoeIcenowyand I found no IP is generated14:40
daveshahNo, it can't14:41
MoeIcenowydaveshah: I found that the verilog file of the sample defines LED pins as output14:43
MoeIcenowywill the same be needed for yosys-nextpnr workflow?14:43
daveshahNo, just the driver primitive should be fine14:43
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MoeIcenowydaveshah: a module without any input or output, but only IPs will not be "optimized"?15:01
corecodewhat kind of module would that be?15:02
corecodeno input or output15:02
MoeIcenowycalls HFOSC15:02
MoeIcenowythen RGBDRV15:02
daveshahJust double checked and keep isn't set on the RGB primitive, so it does need outputs actually15:02
daveshahAdding `(* keep *)` here would change that if you wan it:
tpbTitle: yosys/cells_sim.v at master · YosysHQ/yosys · GitHub (at
MoeIcenowybut I think I will choose to use the oscillator on board with my own board ;-)15:09
MoeIcenowyjust borrow a bitstream from UPduino now to test15:09
MoeIcenowymy iCE40UP5K-SG48I's arrived LCSC at Shenzhen today15:09
MoeIcenowyand will ship to me tomorrow15:09
tntoh they have ice40s now ?15:33
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corecodeMoeIcenowy: where are you at?15:49
MoeIcenowytnt: no, it's digikey via LCSC ;-)15:51
MoeIcenowycorecode: Guangzhou15:52
corecodeah, close to sz15:52
MoeIcenowyyes, close to sz15:52
MoeIcenowy1 hrs of high-speed train15:52
corecodedid you move there or were you born there?15:53
tntMoeIcenowy: oh they do that ? didn't know15:54
MoeIcenowycorecode: moved here 9 yrs ago15:56
MoeIcenowytnt: only available at China15:56
corecodedo you like it?15:56
MoeIcenowystrangely the components at Digikey via LCSC is (very) slightly cheaper than Digikey itself15:57
corecodemaybe special contract15:57
MoeIcenowyfor example, the price of iCE40UP5K-SG48I on Digikey itself is CNY 4915:58
MoeIcenowybut on Digikey via LCSC it's 4715:58
MoeIcenowyand Digikey itself requires one order must be at least CNY30015:58
MoeIcenowybut Digikey via LCSC has no restriction15:58
MoeIcenowy(yes, my order is only 5 iCE40UP5K-SG48I's, so it's less than 30015:59
corecodei guess they pool orders16:01
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emebcorecode: yay - got my old u4k breakout board blinking w/ your icestorm work. Thanks for getting that going.18:51
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emebcorecode: do you have any idea how much effort it would be to add support for the LED driver core in u4k? Without that those three pins appear to be unusable.19:16
corecodeyou can put ios on there19:17
corecodebut they are OD19:17
emebcorecode: Ah ok - I'll give that a shot.19:17
emebOD is fine for driving LEDs - just don't get the current control I guess.19:17
emebseems to work fine. thx.19:21
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emebso I guess it's just that the proper hooks for those IP cores isn't in nextpnr at the moment?19:23
corecodethe cores for the u4k are a bit different19:24
emebah, so it would be necessary to RE them and add support to yosys too.19:25
corecodeyes, most of the work will be in icestorm19:25
emebok, probably not really worth it just to save a few resistors. :)19:26
emebcorecode: is there anyplace I can look to see exactly what features of u4k are unsupported, or is it just a "try and find out" problem?19:28
corecodeyes, look in at the list of peripherals19:29
ylamarreDocumentation is in the code! :D19:29
ylamarreAh! :P19:29
corecodethe u4k ones are really short compared to the 5k19:29
corecodeso those can be reversed and/or confirmed19:30
emebcorecode: thanks - I'll take a look.19:30
emeb(don't know the ice* codebase well enough to know where everything is)19:30
daveshahemeb: The resource utilisation print of nextpnr is also a good list of what primitives are available19:31
daveshahalthough, of course, it doesn't tell you which will actually work19:31
* ylamarre was actually joking.19:31
ylamarreBut turns out, code IS the doc in this case...19:32
emebdaveshah: cool19:32
emebylamarre: I figured you were actually right.19:32
emebthe resource util pg for my blinky design:
tpbTitle: Info: Device utilisation: Info: ICESTORM_LC: 28/ 3520 0% Info - (at
ylamarreemeb: From what I remember is quite nice to go through. Not too difficult to read last time I checked.19:33
emebso looks like all the stuff I care about is there.19:34
ylamarreBut that was like 3 years ago when there was only support for ice40LP/HX19:34
emeblooking at it now - it's a big file but not hard to navigate.19:35
emebheh - u4k extra bits db "made up" - I guess that means they don't actually work.19:39
corecodeyea i didn't bother with trying them for a different footprint19:45
emebheh, yeah. the other footprints are not super easy to design with.19:48
emebI've got one of the "official" Lattice breakouts for the u4k and it's got the little WLCSP-36 part. Hard to imagine the kind of PCB rules you'd need to use that.19:51
corecodeyey so you can port for that footprint20:04
emeblol yes - if I knew WTF I was doing. :)20:05
corecodeyea that's how i started20:05
emebI know that clifford wrote up some #exactsteps for the the process of adding stuff a few years back. I wonder if those still apply.20:07
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corecodeso if you just want to map out connections, just instantiate the IP core and look at the explain output20:56
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emebcorecode: for the n00b, which tool generates explain?22:03
emebderp - icebox_explain. :P22:12
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emebis it my imagination or are the cell coords given by explain off-by-one from those displayed in the icecube floorplanner?22:54
emebnah - they're fine.22:56
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