Wednesday, 2019-02-13

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chaseemoryZipCPU: Would you happen to know how to program the flash on the nexys video with tcl commands?00:13
ZipCPUchaseemory: I've never programmed the flash with tcl commands00:14
* ZipCPU likes to use his own flash driver00:14
chaseemoryoh nice, i switched to an entirely terminal based FGPA flow at home, after doing the ASIC stuff at school, i probably struggled the most with getting programming to work with a tcl script00:15
ZipCPUOriginally, I'd only ever program a board once00:16
ZipCPUEver after, I'd use that first program to load new configurations00:16
ZipCPUYou can find my flash design at if you are interested00:19
tpbTitle: Overview :: Quad SPI Flash Controller :: OpenCores (at
chaseemoryhuh, it seems to work in sim, the digging must continue00:46
ZipCPUchaseemory: Don't tell me you are getting stuck on my sim/h/w mismatch .. ?01:01
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chaseemorywell, it could be... :^)01:23
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sxpertdaveshah: why does nextpnr puts things very far apart, or close together sometimes, with no apparent reason ? I'm getting 2 small blobs one on the horizontal center line, and one 1/5th down the top, all on the left side06:58
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tntsxpert: random initial placement and then randomly moves stuff around to try and improve timing bit by bit. Most likely there is something like a RAM or a DSP or the IOS or something around those points that makes the other logic "attracted" to ti.07:55
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keesjare you guys interested in smaller improvements[tm]? (I am interested in helping out hence tried making a small change and pushing it to the icestorm project but I don't see much happening)08:21
tpbTitle: Move icestick examples to their own respective directory. by keesj · Pull Request #201 · cliffordwolf/icestorm · GitHub (at
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ZipCPUkeesj: Does this mean you are using Verilog now?12:18
sxperttnt: ah, I see. some better initial placement algorigthm would be in order then12:19
sxpertsuch as, preferably use bram blocks next to each other12:19
keesjZipCPU: I am in the middle of different projects right now I first need to use migen (to play/tweak )  hence .. I am ... not where I really want to be (preffer to learn verilog first but .. that is how it goes).12:23
tpbTitle: GitHub - enjoy-digital/litedram: Small footprint and configurable DRAM core (at
keesjhence.. learning about .v the hard way12:24
keesj also looks quite tempting I must say.. but first v12:24
tpbTitle: Welcome to SpinalHDL’s documentation! SpinalHDL documentation (at
keesjslowwwwly getting there:(12:28
tntsxpert: in the projects where it matters, I now resorted to manually place those :p12:29
tntI think it's a bit inherent to the SA placer that large blocks like RAMs are hard to move because (1) you have few locations  (2) since it has lots of connections it's probably hard to find a new location that results in a timing improvement in a single step (i.e. without also moving all the associated logic) and so I'm not sure it's "taken" very often.12:40
tnt(but that's just my crude understanding of SA)12:41
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sxpert%Warning-WIDTH: saturn-decoder.v:447: Operator CASE expects 6 bits on the Case expression, but Case expression's VARREF 'i_nibble' generates 4 bits.13:01
sxpertwhat does that mean ??13:01
sxperti_nibble is indeed 4 bits, and all cases are 4 bits...13:02
sxpertnever mind, some typo13:03
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promach_for yosys-smtbmc, why it does not accept   $anyconst to be used for 'parameter' and 'localparam' ?14:27
promach_ERROR: Failed to detect width for parameter14:27
ZipCPUYea, ahm ... it doesn't work that way14:45
ZipCPURemember, promach_, you are designing "hardware"14:45
ZipCPUparameters can be used to specify the number of wires used in a module, register values cannot adjust that later14:46
sxpertZipCPU: how will something like output  reg [3:0]   o_mem_load[15:0];15:09
sxpertbe generated ?15:09
ZipCPUIt can't be15:10
ZipCPUThat's a memory15:10
ZipCPUYou can't pass memories through I/O ports15:10
sxpertok then15:10
ZipCPUI've sometimes gotten around that by concatenating the items in the memory together, such as output reg[4*15-1:0] o_mem_load;15:10
ZipCPUInternal to the design, you can often then do: for(k=0; k<16; k=k+1) w_mem_load[k] = o_mem_load[k*16 +: 16];15:11
ZipCPULikewise for the same sort of thing in reverse15:11
sxpertthat will generate whatever logic is required to unload ?15:12
sxpertk needs to be declared as [4:0] I suppose ?15:13
ZipCPUk is usually declared as either an integer or a genvar15:21
ZipCPUPersonally, I like the genvar approach better15:21
* sxpert looks what a genvar is15:23
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sxpertso, a genvar is a virtual signal that gets used by the for, and disappears in the design. ok15:32
sxpertas I understand it can only be used within the same event15:33
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promach_What do you guys think about ?16:52
tpbTitle: A signed multiply verilog code using row adder tree multiplier and modified baugh-wooley algorithm · GitHub (at
promach_I will work on induction bugs later, just asking for some comments now16:53
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ZipCPUI get lost when I get to line 8616:59
promach_ZipCPU: look at line 2116:59
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ZipCPUBecause that makes so much more sense?17:00
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promach_understanding graphically is easier17:01
promach_huh ?17:01
promach_I write code based on that picture17:01
ZipCPUYears ago, I remember preparing a presentation for my Ph.D. committee on the work I had done.  I had worked hard on it, and was quite proud of it.  I had the opportunity to show it to one of my sponsors to get his comments on it.  He tore me a new one.  His first comment: my graphs had no units on them17:02
ZipCPUHe then proceeded to go through my graphics, explaining how they looked like "undergraduate" work because they weren't complete in their descriptions17:03
ZipCPUThe picture you recommend on line 21 doesn't even describe the units it is using.  It appears to start with binary, but the '2' digit makes no sense within it17:03
promach_hmm... give me some time to make the code comments clearer17:03
promach_2 means   two '1'17:03
ZipCPUNot without any explanation17:04
promach_1+1 in binary is 1017:04
promach_but in the pic, they just use 217:04
ZipCPUBut 10 is *very* different from 217:04
ZipCPUSo, I'd get torn a new one again for explaining my projects using someone else's pictures17:04
promach_I will make the comments clearer during the weekend17:04
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