Tuesday, 2019-02-12

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emebis it legal to use $readmemh() to define the contents of an ice40 UP BRAM in yosys?16:19
daveshahBRAM, but not SPRAM16:19
daveshahthere is no way in the bitstream to initialise SPRAM16:19
emebI understand that16:20
emebbut I've got a testcase where I use $readmemh() to define a ROM and the CPU won't run correctly16:20
emebbut when I do a case() statement with the same data it works fine16:20
tpbTitle: //`define USE_BRAM `ifdef USE_BRAM // put code in a pre-loaded block ram - Pastebin.com (at pastebin.com)16:21
emebeither of those two works in iverilog, but only the case() works in hardware16:21
daveshahAre you waiting the requisite ~10µs after startup?16:22
emebNot explicitly.16:23
daveshahThe iCE40 BRAM isn't properly initialised at boot16:23
daveshahyou have to wait about 10µs or so for it to work16:24
emebOK - I've got a 2us reset generator. Can try extending that.16:24
daveshahmight be worth trying16:26
emebThanks for the heads-up. That's a very "interesting" detail.16:26
emebdaveshah: OK - that seems to have fixed it. Many thanks.16:33
sxpertdaveshah: ok, rewrote lots of my code last night16:40
sxpertI am at the point where I have most of my imbricated ifs at 3 levels16:41
sxpertis that too much ?16:41
somlodaveshah: mind rebasing nextpnr PR#219 (it now clashes with commit 565d5ee, and I don't feel qualified to decide how to resolve the conflict myself :)16:42
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daveshahsomlo: done16:59
daveshahsxpert: not sure, depends if it meets timing at the end of the day]17:00
somlodaveshah: thanks!17:02
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emebfeeling kinda dumb for not knowing about that 10us startup delay on ice40 BRAM. But quick scanning thru Lattice docs for BRAM and config/startup didn't reveal any obvious documentation for it. Anyone have a reference, or did Lattice just blow it off?17:58
daveshahThere's no official reference afaik17:58
tpbTitle: Block ram reads within ~36 cycles of device reset always return 0, but only on the first reset after device reconfiguration. · Issue #76 · cliffordwolf/icestorm · GitHub (at github.com)17:59
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maikmertenerrata are fun. Undocumented errata are even more fun18:02
maikmerten(depending on your definition of fun)18:03
emeb"teachable moments"18:04
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sxpertdaveshah: I have kept this from all the compile runs20:52
tpbTitle: hp-saturn/history.txt at master · sxpert/hp-saturn · GitHub (at github.com)20:52
sxpertdunno how to interpret it though20:53
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ZipCPUOk ... my proof is running.  Anyone want to chat about what they're up to?22:13
chaseemoryim trying to get the ethernet port on my nexys_video working :D22:17
ZipCPUWhat, you too?22:19
ZipCPUThat was my task yesterday22:19
ZipCPUMade a lot of progress at it too22:19
tpbTitle: GitHub - alexforencich/verilog-ethernet: Verilog Ethernet components (at github.com)22:19
ZipCPUI got to the point where I could read packets, but couldn't write them (yet)22:19
chaseemoryI'm trying to use that22:20
tpbTitle: GitHub - ZipCPU/videozip: A ZipCPU SoC for the Nexys Video board supporting video functionality (at github.com)22:20
ZipCPUchaseemory: Is that your own repository, or someone elses?22:20
chaseemorysomeone elses22:21
chaseemoryI hadnt ever used axi either, so i was reading a few of your articles on it this morning, thinking thats where my hangups were22:21
ZipCPUHeh -- that's today's task, creating a set of formal properties to verify an AXI component22:22
ZipCPUDoes his controller run with AXI?22:22
* ZipCPU looks for the spec/documentation22:22
chaseemoryyeah it uses AXI-stream throughout22:23
ZipCPUOk, got it22:23
ZipCPUI used my own streaming protocol when I needed one22:23
ZipCPUI've never tried to verify anything with AXI stream in it so far ... it just looked too easy  (Of course, I've never used AXI stream, so I could be pretty wrong there too ...)22:24
ZipCPUchasemory: What speed are you trying to run the port at?22:25
chaseemorygigabit, that repo supports gig or 10gig, not that ill be using all that bandwidth22:29
ZipCPUI ask only because at the end of the day, I was getting a weird hw/sim mismatch.  My guess was that the 125MHz clock from the PHY wasn't running at a constant speed.  (I was trying to use the receive clock for transmit as well.)22:30
chaseemoryi know axi says all the lines need to be registered, but im running all of mine combinatorialy, but only based off the current state, so i thought itd be ok22:35
ZipCPUOk, well ... is it okay?22:36
sxpertI worked on what I learned yesterday. in particular, reducing the level of if/case imbrications22:37
ZipCPUsxpert: Still on the fence with formal methods?22:37
* ZipCPU looks over his proof ... it's still running22:38
sxpertwell, I started reading, but still haven't fully understood the thing22:39
ZipCPUHave you found any of the examples of the counters?22:39
ZipCPUThey're good to learn from22:39
sxperthave read this https://zipcpu.com/blog/2017/10/19/formal-intro.html so far22:40
tpbTitle: My first experience with Formal Methods (at zipcpu.com)22:40
sxpert(took a while)22:40
ZipCPUThere's a better interface to the tools than that article presents22:40
ZipCPUSo, when writing a CPU, there tend to be lots of redundancy within the FFs of a design22:41
ZipCPUHmm ... let me start over22:41
ZipCPUWithin a CPU, you have very specific requirements you need to meet.  Perhaps the two biggest are 1) the peripheral/memory interface, and 2) that your various instructions do as you expect22:42
sxpertI'll keep 1 for later22:42
ZipCPUThe neat thing about 1, though, is that once you do it ... it applies everywhere throughout your design--everywhere you (re)use that basic interface22:43
sxpertI'm currently working on decoding all those instructions to something the thing can use22:43
ZipCPUYesh, decoders tend to be ugly22:43
ZipCPUEasy to verify, but ugly to code22:43
sxpertwell, there's a method to the madness ;)22:43
sxpertin particular with that device, everything more or less goes through the ALU22:44
ZipCPURisc-V's are even uglier to decode than ... a lot of the other things I've seen22:44
ZipCPUI had a challenge to prove that I had the right registers going into my ALU.  Your CPU as I recall is much simpler22:45
ZipCPUI was struggling to deal with interrupts, memory wait states, divide and multiply wait states, etc22:45
sxpertcurrently, I'm decoding most of it to dest, op, src1, src2, start_nibble, end_nibble22:45
ZipCPUDo all of your instructions fit within one word, or are they multi-byte instruction strings?22:45
sxpertthey can be up to 21 4 bits nibble22:46
* ZipCPU looks over his proof ... it's still going after step 35, but now up to 30 minutes22:46
ZipCPULet's see ... that's up to nearly 10-bytes long?22:46
ZipCPUThat's ugly22:47
ZipCPUCan you at least depend upon a one clock delay from memory when attempting to read instructions?22:47
sxpertlongest opcode is LA (Load A), 8082n[n-nibbles]22:47
ZipCPULoad address ... how big is your address space?22:48
sxpertnah, load register A, addresses are 5 nibbles22:48
sxpertregisters are 64 bits22:48
sxpertexcept memory addressing registers that are 20 bits22:48
ZipCPUHow many registers?22:48
sxpertA, B, C, D are the main ones, then you have R[0-4] that you can only save into from A or C, then 2 pointers D0 and D1, and some ancillary stuff22:49
ZipCPUSo you have several special purpose registers then?22:50
sxpertyeah, there's a 4 bits P register to point at a particular nibble in one of the others22:51
sxpertsome status bits, and an 8 level return stack22:52
ZipCPUOnly 8 stack entries?22:52
ZipCPU20'bits of memory?  Or just a 20'bit address space?22:53
sxpert20 bits address space, you can configure ram modules to be anywhere in the address space, and move them around as needed22:54
ZipCPUAnd I think you said that the RAM was guaranteed to respond in one cycle, right?22:54
sxpertwell, there's a bus controller that fakes it if required22:55
sxpert(it can stall the cpu if needs be)22:55
ZipCPUReally?  What type of bus?22:55
ZipCPUCustom, or well-known?22:56
sxpertbetween the cpu and the external memory controller is a 4 bits bus, through which things like adresses are sent one nibble at a time22:56
ZipCPUA 64-bit CPU, but with only 4'bits of data bus?22:57
ZipCPUThis is a historical CPU, right?22:57
sxpertactual doc is here : http://www.hpmuseum.net/document.php?hwfile=575722:57
sxpertyeah, this was designed in sept-198422:58
daveshahthat's a really cool project then22:59
sxpertthis thing led to a series of pocket calculators that beat the crap out of Z-80 based casio and TI for a couple decades22:59
ZipCPUDo you know any of the history of that computer?  As in, what makes it valuable to you?22:59
sxpertyeah, used those HP calcs since high school22:59
ZipCPUPocket calculators?  Oh, now that starts to get fascinating22:59
ZipCPUDo you know where/how to find any of the ROMs they used?23:00
sxpertyeah, that's the CPU in the HP series23:00
sxpertall roms are available23:00
tpbTitle: HP Calculator Emulators for the PC (at www.hpcalc.org)23:00
sxpertsee here23:01
sxpertROM something23:01
ZipCPUAre you hoping to recreate a whole calculator with it, and run those ROMs?23:01
ZipCPUOr do you have other goals?23:01
sxpertmake one with a giant led array screen23:01
ZipCPUSounds like a really cool project23:01
* ZipCPU looks at his proof, and starts to think a set of formal AXI properties pales by comparison ;)23:02
sxpertI believe this CPU was also used in some HP printers of the era23:02
ZipCPULineprinters?  Desktop printers?  Dot-matrix?23:02
sxpertI think their initial inkjet stuff23:03
ZipCPUIn '84, wouldn't that have been dot matrix?23:03
tpbTitle: HP Saturn - Wikipedia (at en.wikipedia.org)23:03
sxpertthat article says it all ;)23:03
sxpertso the HP thinkjet23:04
ZipCPUThat article has a *LOT* of links and tables23:04
sxpertthere's a "chipsets and applications" paragraph23:04
ZipCPUNot sure I'd call that a "paragraph" ;)23:05
sxpertwell, table then ;)23:05
ZipCPULet's see ... I bought my first HP calculator in ... was in '95?23:06
ZipCPU(It wasn't a graphing calculator ... ;(23:06
sxpertthen that's what's in there ;)23:06
sxpertwhich one was it ?23:06
ZipCPULooking for it now ...23:07
ZipCPUThe 22S looks familiar23:07
ZipCPUI might have to head upstairs and find out ...23:08
ZipCPUHere it is: the HP-20S23:09
ZipCPUI bought it during a final exam, when I realized afterwards that I needed a calculator for the exam23:10
sxpertsaturn it is ;)23:10
sxpert1LU7, bert ;)23:10
ZipCPUI thought I was buying an RPN calculator.  The 20S isn't an RPN calculator.  It took me a bit before I was productive with it--all during my final exam23:11
sxpertand there's that business series that one needs to be careful about ;)23:12
ZipCPUSounds like you are working on an amazing project.  Thanks for sharing!23:12
ZipCPUWhy so?23:12
sxpertyou mean, the business series ? well they don't do scientific maths ;)23:14
ZipCPUHeh, okay, yeah.  I avoided that series23:15
ZipCPUThe one I purchased could do a 3x3 matrix inverse ... but there was no way I would've figured out how to do that during that final exam23:15
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