Sunday, 2018-06-03

*** tpb has joined #yosys00:00
*** cemerick_ has quit IRC00:31
*** Kitlith has quit IRC00:35
*** Kitlith has joined #yosys00:43
*** promach_ has joined #yosys01:13
promach_For temporal induction, Could anyone advise why does not follow assertion in line 277 ?02:05
promach_just for info, line 277 had passed BMC02:20
*** rqou has quit IRC03:39
*** leviathan has joined #yosys03:39
*** rqou has joined #yosys03:39
tpbTitle: UART/test_UART.v at development · promach/UART · GitHub (at
*** dxld has quit IRC03:53
*** dxld has joined #yosys03:54
*** promach_ has quit IRC03:55
*** seldridge has joined #yosys04:23
*** emeb_mac has quit IRC07:10
*** _whitelogger has quit IRC07:22
*** _whitelogger has joined #yosys07:24
*** Guest23074 is now known as jayaura07:35
*** seldridge has quit IRC07:36
*** promach has quit IRC08:01
*** dys has joined #yosys08:27
*** promach has joined #yosys08:53
*** proteus-guy has quit IRC09:22
*** mjoldfield has joined #yosys09:22
*** proteus-guy has joined #yosys09:23
*** dys has quit IRC09:24
*** _whitelogger has quit IRC10:22
*** _whitelogger has joined #yosys10:24
*** jwhitmore has joined #yosys10:39
*** dys has joined #yosys10:50
*** clifford has quit IRC11:17
*** quigonjinn has joined #yosys12:35
*** promach_ has joined #yosys12:47
ZipCPUpromach_: You are going to find it difficult for someone to comment on your code based upon just a couple lines.13:03
ZipCPUYour logic spreads across many files, the trace doesn't make much sense without a thorough understanding of how your logic works.13:03
ZipCPUWorse, those couple of lines you are struggling with are long lines that are difficult to read and follow.13:04
*** quigonjinn has quit IRC13:04
*** AlexDani` has joined #yosys13:23
*** AlexDaniel has quit IRC13:24
*** mjoldfield has quit IRC13:44
*** mjoldfield has joined #yosys13:48
promach_ZipCPU: you are right, but not with line 27714:00
promach_shift_reg should follow assertion at line 277 in induction14:00
*** mjoldfield has quit IRC14:26
*** mjoldfield has joined #yosys14:44
*** emeb_mac has joined #yosys14:58
*** m_t has joined #yosys15:12
*** seldridge has joined #yosys16:04
*** m_t has quit IRC16:13
*** leviathan has quit IRC16:38
*** promach_ has quit IRC16:39
*** leviathan has joined #yosys16:42
*** seldridge has quit IRC17:06
*** seldridge has joined #yosys17:20
ZipCPUpromach: The number of bits on the right hand side of that equation should match the number of bits on the left.17:52
*** AlexDani` is now known as AlexDaniel18:28
*** m_t has joined #yosys18:31
*** proteusguy has joined #yosys18:38
*** seldridge has quit IRC18:47
*** ralu has quit IRC18:52
*** ralu has joined #yosys18:52
*** ralu has quit IRC18:57
*** ralu has joined #yosys18:57
*** sklv has quit IRC19:02
*** sklv has joined #yosys19:03
*** leviathan has quit IRC19:15
*** emeb has joined #yosys19:30
*** seldridge has joined #yosys20:16
*** m_t has quit IRC20:25
*** kensan has joined #yosys20:58
*** dys has quit IRC21:33
*** seldridge has quit IRC21:58
*** jwhitmore has quit IRC22:37
*** danieljabailey has quit IRC23:04
*** danieljabailey has joined #yosys23:04

Generated by 2.13.1 by Marius Gedminas - find it at!