Tuesday, 2018-05-22

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develonepi3Hello Bare Metal on the RPI programmed the CATBOARD.18:31
develonepi3With speechfifo.bin Verilog provided by ZipCPU18:31
develonepi3hen using the RPi uart Received data being sent from the HX8K FPGA.18:32
develonepi3Bare Metal UDP Server sent the data to a host using a UDP socket.18:32
tpbTitle: Ultibo_Projects/speechfifo.png at master · develone/Ultibo_Projects · GitHub (at github.com)18:33
tpbTitle: Ultibo_Projects/speechfifo.txt at master · develone/Ultibo_Projects · GitHub (at github.com)18:34
develonepi3I have been trying to get FPGAs into Ultibo the bare metal project for the RPi,18:36
develonepi3With the cmd tftp xx.xx.xx.xx <  cmdstftp a new program can installed in the FPGA.18:42
develonepi3The RPi reboots when the new kernel7.img is received.18:43
develonepi3I now have 13 projects that can be updated by the same method.18:46
develonepi3The jpeg project demonstrates using C with bare metal.  I have compiled openjpeg to a static lib and is now works on bare metal.18:52
develonepi3yosys tools & bare metal will make a great combo.18:53
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