Tuesday, 2018-06-12

*** tpb has joined #vtr-dev00:00
*** digshadow has joined #vtr-dev01:42
*** digshadow has quit IRC01:47
*** digshadow has joined #vtr-dev03:03
daveshahmithro: yay!07:31
daveshahNext step is probably checker07:36
mithrodaveshah: Yeah - need to finish RAM routing support for that16:03
mithrodaveshah: Which should be relatively simple16:03
mithrodaveshah: I would also like to get some proper timing data into the model16:04
daveshahmithro: Sure, we can discuss that later16:04
mithrodaveshah: Would you be able to verify that pnr for blink passes on your computer?16:05
daveshahmitho: yeah, I'll take a look in an hour or two16:05
mithrodaveshah: Okay great16:09
mithrodaveshah: I would also like to understand the issue jhol was having that I documented here -> https://github.com/SymbiFlow/symbiflow-arch-defs/issues/14416:14
tpbTitle: Create an ice40 test for the packing of different types of flip flops together · Issue #144 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)16:14
mithrokem_: So, we have a "blinky" demo for the ice40 which should work on real hardware!16:26
kem_mithro: Nice!16:27
mithrokem_: At some point I would like to discuss how to merge this stuff...16:27
kem_mithro: Probably best to present an overview of what the changes involve at this week's VTR meeting.16:29
mithrokem_: The two big parts are adding metadata support to most objects and the actual HLC writer16:29
mithrokem_: the HLC writer is the only part which is really ice40 specific16:30
kem_mithro: I'd suggest putting together a (short) presentation which walks through the changes, and importantly their motivations.16:31
mithrokem_: Okay - it'll probably only end up being 3 slides :-)16:31
kem_mithro: Sounds good, it just gives us something concrete to discuss and reference16:32
kem_mithro: Its not really clear to me yet (and I suspect others) where the dividing line should be between VTR and the device-specific code; so I expect that to be the main topic of discussion16:34
mithrokem_: Yeah - I've tried to keep the device-specific code as minimal as possible16:34
mithrodaveshah: It would be good if you or clifford could look at the icestorm pull requests too16:37
daveshahmithro: yeah, I'm sure clifford will deal with them soon16:38
mithrodaveshah: "deal with them" sounds so ominous :-P16:38
daveshahmithro: the FF issue is basically17:01
daveshahsome of the FF configuration is shared between all 8 FFs in a tile17:01
daveshahclk, cen, s/r signals, and whether or not they are used, are shared17:01
daveshahas is clock polarity17:01
daveshahsync/async and set/reset can be set per flip-flop17:01
daveshahwtf conda seems to be installing a whole Linux distribution :P will test once thats done (was subverting it with some symlinks but that seems to have broken)17:07
mithrodaveshah: Yes, I understand it as a high level and as far as I understand it, the packer should check validity and refused to pack unroutable things together17:09
daveshahmithro: the problem is not routability, its modes too17:09
daveshahif one flipflop uses a negative edge clock, all in that tile must use a negative clock (or have the DFF disabled)17:09
mithrodaveshah: Sure - that means the clk signal path will be used for nclk and there will be no path to get clk to the DFF -- hence routing will fail17:10
daveshahthe routing in this case is identical17:10
daveshahjust the primitive is different17:10
daveshahSB_DFFN vs SB_DFF17:11
mithrodaveshah: A SB_DFFN is a SB_DFF with a nclk rather than a clk, right?17:11
mithrodaveshah: and there is one possible nCLK inverter for the whole tile, right?17:12
daveshahyes, but there is no concept of an nCLK inverter in any other toolchain17:13
daveshahthe clock net is still named the same17:13
daveshahproof is failing. which icestorm branch should I be on?17:13
daveshahI'm on ddd7cd00c80f79998a27d441f4b9ad4ff099766917:14
daveshahalso, is it symbiflow 4mcmaster2?17:14
daveshahah, getting QED on 4mcmaster717:15
mithro4mcmaster on everything17:15
mithrodaveshah: It's something like ClkNeg right?17:15
daveshahNegClk, the config bit is called17:16
mithrodaveshah: Could you get me some verilog which has a bunch of SB_DFF and SB_DFFN's in them?17:26
mithrodaveshah: Does the N always go after the SB_DFF? or at the end?17:27
mithroIE is it SB_DFFESSN or SB_DFFNESS ?17:27
daveshahthe latter17:27
daveshahPre synthesis verilog https://www.irccloud.com/pastebin/GnERfGBj/ff_modes.v17:28
tpbTitle: Snippet | IRCCloud (at www.irccloud.com)17:28
daveshahPost synthesis verilog https://www.irccloud.com/pastebin/orc1lIcP/ff_modes_synth.b17:29
tpbTitle: Snippet | IRCCloud (at www.irccloud.com)17:29
daveshahThis is a small test case I've used17:29
*** digshadow has quit IRC17:29
mithrodaveshah: Okay, have meetings now will have something for you in an hour or two17:31
*** digshadow has joined #vtr-dev17:55
mithrodaveshah: Wouldn't happen to have a pcf file for that?18:06
daveshahNo, but you can create one easily enough18:06
mithrodaveshah: I ran out of pins from the iceblink.pcf :-P18:07
daveshahHave a look at the list of pins in icebox then18:08
tpbTitle: icestorm/icebox.py at master · cliffordwolf/icestorm · GitHub (at github.com)18:09
mithrodaveshah: Yeah most of the way through a tool to auto-convert pcf files19:24
*** digshadow has quit IRC21:35
*** digshadow has joined #vtr-dev22:03

Generated by irclog2html.py 2.13.1 by Marius Gedminas - find it at mg.pov.lt!