Wednesday, 2019-05-01

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alexhwxobs/mithro: Hi, I worked in the receive pipeline of valentyusb (see This should reduce rx latency by a total of ~8 bit times (5 for filling FIFO, 2 in RxShifter, and 1 by not having an extra register between RxShifter an the output port).00:14
tpbTitle: Refactored RX pipeline to get rid of excessive delay from MultiReg by usbalex · Pull Request #1 · xobs/valentyusb · GitHub (at
alexhwInfo: Max frequency for clock   'clk12': 14.54 MHz (PASS at 12.00 MHz)00:15
alexhwInfo: Max frequency for clock 'clk48_1': 62.20 MHz (PASS at 48.00 MHz)00:15
alexhwI don't have my hacker fomus running yet, so I couldn't test it on hardware.00:15
xobsalexhw: awesome! I'll run it on my evt board and make sure it works on hardware, and then go ahead and merge it.00:18
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kapaThank you pollo! I will try01:37
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polloI received my RPI today! Still waiting for clips to arrive, but I should be able to flash my fomu soon!02:19
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m_wmithro: you have any 2x6 right angle female headers for PMOD you can bring to latchup?02:42
m_wseems like the only ones I could find are at digikey02:44
tpbTitle: PPPC062LJBN-RC Sullins Connector Solutions | Connectors, Interconnects | DigiKey (at
futarisIRCcloudm_w: I bought some similar connectors from eBay:03:14
tpbTitle: 20PCS 2.54mm pitch 2x10Pin Header Right Angle Double Female Row Socket Connector | eBay (at
tpbTitle: 20PCS 2.54mm Pitch 2x6Pin Header Right Angle Female Double Row Socket Connector 652042058848 | eBay (at
tpbTitle: 20PCS 2x6Pin Header Right Angle Female Double Row Socket Connector 2.54mm Pitch 652042058848 | eBay (at
m_wyeah I need them for this weekend though03:17
m_webay doesn't usually have the fastest turn time03:17
m_wxobs: what software do you use on the fomu fixture for programming the flash?03:18
tpbTitle: Portland Resources for Dorks | DorkbotPDX (at
futarisIRCcloudOregon Electronics & URS Electronics03:26
tpbTitle: Arduino and led light strips :: Arduino :: Header Kit (at
futarisIRCcloudm_w: openocd -
tpbTitle: GitHub - im-tomu/tomu-bootloader: Bootloader for the EFM32HG Tomu Board (at
m_wfutarisIRCcloud: that is for the tomu, the fumo is a different creature03:35
futarisIRCcloudm_w: Whoops. Wrong link.
tpbTitle: fomu-hardware/hacker at master · im-tomu/fomu-hardware · GitHub (at
m_wyeah that looks right03:38
futarisIRCcloudFrom last weekend:03:39
futarisIRCcloud(actually a week and a half ago)03:39
m_wyeah I just need the software, since I have a new design03:39
tpbTitle: Release Its About Time · im-tomu/fomu-pi-gen · GitHub (at
futarisIRCcloudGrab that raspberry pi image, and flash it to a SD as per
futarisIRCcloudm_w: ^03:44
m_wlooks like it is bitbanging SPI03:44
m_wI don't own a raspi :-/03:44
futarisIRCcloudm_w: Yeah, bitbanging SPI.03:46
tpbTitle: GitHub - im-tomu/fomu-flash: Utilities to flash Fomu from a Raspberry Pi (at
m_wI can port it to pocketbeagle , I have one of those since I helped design it03:47
m_wstill think flashrom is a viable option if the FPGA is held in reset or something03:48
futarisIRCcloudm_w: Yep. That's all that happens in fomu-flash.c / fpga.c / spi.c ...03:55
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futarisIRCcloudAnyone else want to build a GoodWatch30?
tpbTitle: Free Assembly for 5 PCBs (at
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xobsm_w: I wrote fomu-flash because there's a bit of a dance to put the FPGA into reset when you program spi. Or, if you're directly loading a Bitstream into the FPGA, you need to put the spi flash into reset. And fomu-flash supports quad spi.05:50
xobsBut the first incarnation was done with flashrom and some bash scripts.05:50
xobsI just ran into an issue with the spidev kernel module where it was ignoring the NO_CS flag, and so flashrom didn't work at all. I think that may have been the Fedora kernel I was using.05:51
keesjfutarisIRCcloud: it is a cool project06:35
tntm_w is the guy doing the latchup badge right ?06:38
futarisIRCcloudtnt: Yes. ...06:41
futarisIRCcloud~ 20 USD for the parts on the BOM. ~19 USD for the PCB...06:44
futarisIRCcloudabout 20 USD for the parts on the BOM. about 19 USD for the PCB...06:44
tntI just wanted to tell him there shouldn't be current limiting resistor on the RGB led ...06:44
tntbut haven't seen hoim online at the same time as me lately :p06:45
keesjI found flashrom extremely slow07:58
keesjmy plan now it to use a tinyfpga-bx and modify the bootloader to use different pins for the programming07:59
keesjI also think it would be very cool to do the same with the litex wishbone bridge + a spi running on the FPGA. that would really be a nice generic solution08:00
futarisIRCcloudYou could then use one fomu (or any other fpga board with litex support) to program another fomu ...09:06
keesjI did a little testing using python when following the tutorial and tried to understand a few times how to test the serdes but I still don't quite get it09:19
keesj I am trying to follow the xapp1017 notes (my current code)09:23
tpbTitle: Ubuntu Pastebin (at
keesjI am currently generating a 48Mhz differential clock (from tinyfpga) on the pmod connector of the broad and trying to sample other lines (and the clock line) using a serdes09:25
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keesjwrong channel .. was for litex sorry09:26
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tntxobs: I had a quick look at alexhw[m] 's patch. Looks good. Definitely should solve most issue wrt to not answering in time. The only case that might still be not compliants is for large clock difference where the host is faster and very long packets, bits will fill up the fifo and increase the response latency.10:46
tntMmm ... actually ... there might be an issue with it.10:48
tntthe gating on the write side of the fifo is still needed AFAICT.10:49
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alexhw[m]tnt: I don't understand why the write should be gated. It does not make processing any faster and decreases the number of available fifo slots (not critical, fifo size can be increased). Accepting two bits per clock or running in the 48mhz domain would solve the issue completely though.12:11
tnt" decreases the number of available fifo slots" ? Huh ?12:17
tntDid you read my explanation in the github issue ?12:17
tntalexhw[m]: ^^12:17
alexhw[m]Not yet12:39
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alexhw[m]tnt: Ok, I got it now. I somehow expected nrzi.o_valid to not be asserted when the bus is idle. This behaviour should be easily achievable though. I will look into it later this day.12:51
tntalexhw[m]: originally I thought so too, but then I found that the packet detection etc is done in the 12M domain, so nrzi is done continuously (since it has no idea where packets are etc ...). so I added this small 'activity' detector.12:53
alexhw[m]tnt: nrzi still gets the se0, so it can pause valid signal as long as the bus is in idle ('j' ?)12:55
tntalexhw[m]: yes you could do that.12:57
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xobsfutarisIRCcloud: you were right, the USB bcdVersion wasn't correct, which was causing Windows to abort the transaction.17:30
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xobsThough this is weird.  I can get it to work on my Windows machine only if I first run it through a USB-C hub.  If I plug it directly in, I only see resets -- I never see any traffic flow.  Not even an attempt to do a SETUP.19:10
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tntxobs: the usb hub might be more tolerant of timing violation21:19
xobstnt: could be, but I don't see _any_ traffic.  At least not on the protocol analyzer.21:20
tntoh. wrong pull up value ?  Does the host detect at up something is plugged ?21:21
xobsIt does detect that something is plugged.21:22
xobsIt's super weird.  Not a single byte detected.21:23
* xobs uploaded an image: image.png (67KB) < >21:23
tntscope time :p21:24
xobsFor sure.21:24
xobsBy the way, I made a small change to the usb debug bridge.  I changed the packet to 0x43 rather than 0x40, because for some reason Windows was generating a 0x40 when presented with bcdUSB = 2.10 (which in itself was a bug).21:32
xobsAlso, I've created a Rust implementation of devmem2:
tpbTitle: wishbone-adapter/usb at master · xobs/wishbone-adapter · GitHub (at
xobsI did it in Rust because of performance, and also because I couldn't figure out how to run pyusb on Windows.21:32
xobsAnother reason for changing the "debug packet" magic value to 0x43 is that when I set it back to 0x40 it didn't meet timing.  Joy.22:16

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