Monday, 2018-12-24

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xobsmithro: I fell off an experience cliff. HDL is obviously not a language type I'm used to planning in.00:35
mithroxobs: Well, I'm reworking the usb core right now00:35
xobsAlso, still learning all the FHDL primitives. Figuring out things like Memory and buffers.00:35
xobscr1901_modern: I'm not sure how useful it is upstream. Maybe. It assumes 32 bits, which is true of cpu memory but icebram is more generic.00:36
mithroxobs: I'm moving almost everything into the 12MHz domain00:37
xobsmithro: woo!00:37
mithroand it is surprisingly making a whole bunch of things a *lot* simpler00:37
xobsAlso, I moved to vexriscv and timing got a lot simpler, too. 56 MHz, but I don't know what it's optimizing out.00:38
xobsI got ten evt2 boards made that should have just been delivered to the office, so I look forward to trying out what you've got.00:53
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xobsBy the way, is anyone interested in my "" wrapper scripts that spawn bash as a subshell?
tpbTitle: litex-buildenv/ at fomu-evt · xobs/litex-buildenv · GitHub (at
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mithroxobs: I've pondered that06:17
mithroxobs: I'll do the tx pathway tomorrow06:19
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xobsWoo, only one critical issue in Fomu EVT2, and it's a silk issue.  Just means I need to slide a resistor over on all 10 boards:
CarlFKslide a resistor over ?09:25
* xobs uploaded an image: image.png (199KB) < >09:27
xobsSomehow I swapped the "R3" and "R13" silk markings.  So they populated the pulldown instead of the pullup, which will prevent the FPGA from self-booting.09:28
CarlFKthat's a bit different from
xobsYeah, that's evt1.  I should take a photo if the new one.09:33
xobsMaybe someone at CCC will have a lightbox :)09:33
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mithroMerry Xmas for people who are already on the 25th December!22:33
mithroxobs: What is with that weird thing on the USB connector?22:34
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mithroFirst attempt at new SymbiFlow website ->
tpbTitle: SymbiFlow (at
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