Saturday, 2018-11-17

*** tpb has joined #timvideos00:00
*** Krhoppy has joined #timvideos05:21
*** Krhoppy has left #timvideos05:23
tannewtmithro, I do have ICE40UP5k and ICE408k dev boards too06:47
tannewtbxes are scheduled to come monday06:47
*** rohitksingh has joined #timvideos07:27
*** rohitksingh has quit IRC07:44
*** rohitksingh has joined #timvideos08:16
*** rohitksingh has quit IRC08:32
*** rohitksingh has joined #timvideos08:42
*** rohitksingh has quit IRC09:21
*** rohitksingh has joined #timvideos09:21
*** rohitksingh has quit IRC12:04
*** springermac has quit IRC12:27
*** springermac has joined #timvideos12:31
*** rohitksingh has joined #timvideos14:51
*** rohitksingh has quit IRC15:06
*** rohitksingh has joined #timvideos16:09
*** rohitksingh has quit IRC16:25
*** rohitksingh has joined #timvideos16:28
*** rohitksingh has quit IRC16:39
*** rohitksingh has joined #timvideos17:21
*** rohitksingh has quit IRC17:32
*** rohitksingh has joined #timvideos17:34
*** Kripton has quit IRC17:38
*** rohitksingh has quit IRC17:48
*** Kripton has joined #timvideos17:58
*** rohitksingh has joined #timvideos18:39
CarlFKrohitksingh: hi!18:48
tannewtmithro, are you working usb today at all?18:48
rohitksinghCarlFK: hi!18:48
mithrotannewt: yeap!18:49
mithrotannewt: probably be starting in like an hour18:49
mithroI'll not a morning person :-P18:49
tannewtmithro: kk, I'll plan on being around. would be good to get me setup with litescope.18:50
mithroHave you got MicroPython booting on anything yet?18:54
tannewtno but I did install the environment18:55
tannewtI'll get the arty going18:55
CarlFKis that this?
tpbTitle: HowTo FuPy on a Digilent Arty A7 · timvideos/litex-buildenv Wiki · GitHub (at
mithrotannewt: what were the other Dec boards you had?19:00
tannewtthe 8k and the 5up19:01
tannewtfrom lattice19:02
mithrotannewt: might try too19:04
tpbTitle: HowTo FuPy on iCE40 Boards · timvideos/litex-buildenv Wiki · GitHub (at
CarlFKin #pumpingstationone:  bjonnh: I'm trying to get the largest dense matrix from my sparse matrix19:04
CarlFKhe is working with "under 64gig of data"19:05
CarlFKwhat fpga board can host? 64g of ram?19:05
daveshahPlenty of FPGA boards can host 64GB of RAM19:06
daveshahThe question is how many can make effective use of it19:06
CarlFKare you talking about the hardwired? interface, or the hacker's fpga skill ?19:08
tannewtmithro any schematics available for the new tomu? I can solder it up19:09
daveshahCarlFK: hacking something on eg to an FMC connector19:10
daveshahDon't know how many have actual support for something like that19:10
tpbTitle: FPGA board features support for up to 256GB of DDR4 (at
daveshahhi tannewt btw19:11
daveshahYou did the original ultraplus that I continued didn't you19:11
tannewthi daveshah ! nice talk on the ecp5 at ORConf. I watched it last night!19:11
tannewtya, I started it :-)19:12
CarlFKnext q: what are the chances of micropython doing something like threads,  even if it was a new vm chewing up  gobs of ram?19:14
daveshahthanks tannewt!19:15
CarlFKbjonnh is doing R&D, he has a run down to 45min. in python/numpy. if his task could be parallelized, a 10x boost would be super beneficial.   100x would be super cool, but the edge of useful.19:20
tannewthow do I exit the litex env so I can change the platform?19:23
tannewtCarlFK: I think micropython can do basic threads19:24
*** TimGremalm has quit IRC19:25
*** TimGremalm has joined #timvideos19:25
CarlFKtannewt: litex env - I think you set the vars and re-run source ./scripts/enter-env.sh19:26
mithrotannewt: you can just change the environment variables, no need to exit19:28
tannewtI sorted it out... and then kworker hung so I had to restart19:32
tannewtok, back and hopefully won't hang19:58
mithrotannewt: What is your github username?20:02
tannewtmithro, tannewt as well20:20
tannewt(sorry I was soldering)20:20
CarlFKdaveshah: any idea what it costs?  this doesnt help:
tpbTitle: XUSP3R - BittWare (at
daveshahI would guess its classic a case of if you have to ask then you can't afford it20:27
mithroCarlFK: probably like $USD 20k20:28
CarlFKok thats out.20:29
mithroCarlFK: you are unlikely to get a FPGA board with 256gb ram which isn't like 20k+20:30
CarlFKmithro: how about a pcie card that can use a PC's 256g ram?20:34
mithroCarlFK: what are you trying to do?20:34
CarlFKmithro: in #pumpingstationone:  bjonnh: I'm trying to get the largest dense matrix from my sparse matrix20:34
CarlFKmithro: his dataset is "under 64g" and he has runs down to 45 min20:35
daveshahI wouldn't be surprised if a better CPU implementation is the best way forward20:35
mithro /maybe/ a GPU solution20:35
mithroBut I doubt an FPGA would help here20:36
CarlFKdaveshah: for practical values of best ;)20:36
CarlFKhe is already doing the work in python, so if the code could be run on both cpython and micropython, it would help verify the results20:37
CarlFKand advance micropython on fpga20:38
daveshahAn optimised fpga solution certainly won't involve micropython!20:40
daveshahIt sounds like using the optimised instruction set of modern CPUs might be a way forward, almost certainly an improvement over Python20:41
CarlFKdaveshah: that's why I mentioned that we don't need 100x improvement20:41
daveshahYou presumably also don't want a 100x slowdown20:41
CarlFKwe are at 45 min on cpython/numpy.  lets assume 8 runs a day.  if it takes 8 hours of work to get 10x, thats paid for itself in 2 days20:43
mithroCarlFK: Your not going to get 10x faster on an FPGA in just 8 hours of work20:43
mithroCarlFK: Maybe 80 hours if your very good20:44
mithrotinyfpga: Were you just exporting the verilog from tinyusb and importing into icecube2 manually?20:45
CarlFKmithro: the hope was micropython parallel  threads would be faster than cpython cpu20:45
mithroCarlFK: Not a chance20:45
mithroCarlFK: Doesn't work that way at all20:48
CarlFKmithro: ok, what about using python to populate memory, and porting the needed numpy algorithms to risk/C, and parallelizing that?   (yes, slinging words around loosely)20:50
CarlFKpart of the plan is being able to use the cpu cpython/numpy code to verify the results on the runs that seem interesting20:51
tannewtI thought numpy was mostly implemented in C anyway20:53
CarlFKtannewt: im guessing it will take a bit to make it work on micropyton/soft core (risk 5?)20:55
tannewtyes, definitely20:56
tannewtnumpy is not small20:56
tannewtmost cpython libs contain the kitchen sink20:56
daveshahYou would also be looking at a very special soft core20:57
CarlFKmore hope was that only the parts needed for this project can be "ported" (is that the right word?)20:57
mithrotannewt: The risc-v core is substantially slower than your computer's CPU20:57
mithroCarlFK: The risc-v core is substantially slower than your computer's CPU21:03
CarlFKmithro: the cpu has a few cores.    how does that translate to risk-v core? like is there a config option cores=100 ?21:06
mithroCarlFK: nope, we only really support a single core at the moment21:07
CarlFKmithro: rats. ok, thats the end of that.21:07
mithroEven if we did, I doubt it would be better than a GPU21:08
daveshahOr something like a Xeon Phi21:08
mithroCarlFK: the SoftCPU in our FPGA is a low performance "management" engine21:10
mithroIt's there to do non-performance critical stuff to manage the specific function stuff21:11
mithrodaveshah: how do I use the multiple clock domain stuff in nextpnr?21:12
tpbTitle: nextpnr/ at master · YosysHQ/nextpnr · GitHub (at
daveshahIf you just want reports, it will print them for all clocks by default21:12
daveshahI wouldn't expect constraints to make that much difference as it stands21:13
CarlFKk - I was hoping that investing  a day or so porting generic things would help the micropython worls and give bjonnh a 10x boost21:13
CarlFKhelp the micropython world21:14
mithrodaveshah: well, the USB clock needs to be greater than 48mhz21:14
tannewtmithro: are you developing on the tomu or the bx? I'm wondering if its worth soldering wires to the tiny pads21:32
mithrotinyfpga-bx for the moment21:32
mithroUntil I get things going21:32
tannewtmakes sense21:32
*** rohitksingh has quit IRC21:41
mithrocr1901_modern: ping?22:33
tannewtis there a specific baudrate needed for the serial to a up5k evn board?22:33
tannewtI think micropython loaded ok but don't get any serial22:34
daveshahI thought the EVN doesn't have serial22:34
daveshahYou might need to add pins22:34
tpbTitle: HowTo FuPy on iCE40 Boards · timvideos/litex-buildenv Wiki · GitHub (at
tannewtya, I soldered to the ones in the platform file and hooked up a usb to serial converter22:34
daveshahmithro: yup, don't know why Lattice were that stupid22:35
tpbTitle: litex-buildenv/ at master · timvideos/litex-buildenv · GitHub (at
daveshahI'm sure the hx8k breakout has serial22:35
tannewtit says 48b and 51a22:36
tpbTitle: litex-buildenv/ at master · timvideos/litex-buildenv · GitHub (at
* mithro goes to delete that obsolete information...22:37
tannewttaking a break now to play some fallout. my linux box is still soft hanging pretty frequently22:39
mithrotannewt: Do you know how to filter wireshark usb capture to just anything below a given hub?22:51
tannewtno, I usually use a beagle which does just the one device23:11
mithro_florent_: You happen to be around?23:14
mithroJust wondering how you use LiteScopeIO23:15
mithroIn [5]: wb.regs.io_out.write(0x1)23:19
mithroIn [6]: wb.regs.io_out.write(0x0)23:19
mithroJust like that it seems..23:19
mithroThis looks promising...23:20
mithro[414884.260173] usb 2-14.1: Device not responding to setup address.23:20
mithro[414884.472182] usb 2-14.1: Device not responding to setup address.23:20
tannewtare you acking the setup packet?23:21
mithrotannewt: probably not23:23
mithrotannewt: But the fact that something is happening at all is potentially good :-P23:23
tannewtyup! you've taken the pins out of reset :-)23:24
mithrotannewt: I can toggle it in and out of reset by using the io_out module...23:25
mithroNo I just have to remember how to litescope to capture the data....23:25
mithrodaveshah: Did nextpnr start consuming a lot more memory when compiling the database for the ice40?23:34
*** samsagaz has quit IRC23:46
*** samsagaz has joined #timvideos23:47

Generated by 2.13.1 by Marius Gedminas - find it at!