Tuesday, 2018-10-30

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mithroCarlFK: yeap :-)01:59
CarlFKmithro: do you have red/black wire, soldering iron and shrink tubing?01:59
mithroNo soldering iron02:00
CarlFKk, tumbleweed does.  (hear that tumbleweed!!)02:00
CarlFKmithro: so the only thing I need to order is power connectors?   and then spend an afternoon assembling02:01
mithroI think we might need stand offs?02:01
CarlFKmithro: the case has little ones, and I think taller ones in a bag..02:03
mithroCarlFK: This is for going between the expansion card and the opsis board02:09
CarlFKah, the 90 thing?02:09
CarlFKor to support the card02:10
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mithroTo support the card02:27
mithroI'm pretty sure the holes don't quite line up...02:27
CarlFKI'm sure this can be solved by a trip to Fry's - I expect to spend a day on this, likely Tues or Wed after NBPy02:42
tumbleweedCarlFK: you want a soldering iron?03:07
cr1901_modernmithro: Commit 1cac079ef in litex broke vivado builds for me, just FYI :P >>03:09
cr1901_modernhttps://github.com/enjoy-digital/litex/blob/master/litex/build/xilinx/vivado.py#L244-L248 This will ensure if synth_mode != yosys, we error out03:10
tpbTitle: litex/vivado.py at master · enjoy-digital/litex · GitHub (at github.com)03:10
CarlFKtumbleweed: yes.   but I have other sources, not sure borrowing yours and having no plan to get it back is a good idea03:21
cr1901_modernmithro: When I try to install micropython on arty w/ vexriscv or picorv32, conda is still looking for the "gcc-riscv32-unknown-elf-newlib" binary.03:39
mithrocr1901_modern: Hrm....03:39
cr1901_modernWho do you remember running fupy w/ riscv?03:39
mithrocr1901_modern: Yes, _florent_ merged my WIP pull request....03:40
mithroCan you fix and I'll merge into LiteX straight away....03:41
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cr1901_modernmithro: https://github.com/enjoy-digital/litex/compare/master...cr1901:patch-203:42
tpbTitle: Comparing enjoy-digital:master...cr1901:patch-2 · enjoy-digital/litex · GitHub (at github.com)03:42
mithroThat is wrong03:42
mithroYou always need to run vivado no matter the synth mode03:43
cr1901_modernmithro: what about this? http://ix.io/1qpV03:46
mithroIsn't that what is already there?03:47
cr1901_modernNo, I removed the OS error03:47
mithroOh, yeah03:47
cr1901_modernmithro: Is this fine? https://github.com/enjoy-digital/litex/compare/master...cr1901:patch-303:49
tpbTitle: Comparing enjoy-digital:master...cr1901:patch-3 · enjoy-digital/litex · GitHub (at github.com)03:49
mithroYeap, that looks good to me!03:50
cr1901_modernhttps://github.com/enjoy-digital/litex/pull/121 PR03:50
tpbTitle: Update vivado.py by cr1901 · Pull Request #121 · enjoy-digital/litex · GitHub (at github.com)03:50
mithrocr1901_modern: Merged04:00
cr1901_modernthanks04:01
cr1901_modernmithro: Yea, even on arty I'm still getting the hardfloat/softfloat mismatch04:19
cr1901_modernand multiple definition of _start04:19
mithrocr1901_modern: Maybe it was only vexriscv that worked?04:20
cr1901_modernI even manually changed the compiler to riscv32-unknown-elf-gcc on a lark and got the same errors04:20
cr1901_modern(riscv32-unknown-elf-gcc actually _has_ a newlib impl)04:20
cr1901_modernmithro: Actually you're right that micropython _has_ worked on picorv32... daveshah has done it building on mmicko's work04:25
cr1901_modernthe question is what am I doing wrong?04:25
cr1901_modernokay I got a binary that compiles04:34
cr1901_modern-nostartfiles needs to be explicitly passed04:34
mithrocr1901_modern: Did you test on vexriscv or picorv32?04:47
cr1901_modernpicorv3204:48
cr1901_modernYea I have no less than 3 separate PRs that'll need to be merged04:48
mithrocr1901_modern: Can you check vexriscv?04:48
cr1901_modernbecause I couldn't boot on ice40_up5k_b_evn at all, I'm trying on Arty04:48
cr1901_modernmithro: Not at the moment, I'm kinda swamped04:49
cr1901_modernCRC failure when loading micropython, that's good04:51
mithrocr1901_modern: I would /really/ check if things are/where working on the arty with vexriscv before I got too far into things04:51
cr1901_modernSomeone removed flashboot from arty, so I manually put it back in04:52
cr1901_modernlooks like whatever I added didn't work04:52
cr1901_modernmithro: Checksum fail w/ vexriscv too05:02
cr1901_modernwonder if endian issue05:03
mithrocr1901_modern: Well -- that is good to know that it is failing in both vexriscv and picorv3205:09
cr1901_modernmithro: Manually reversed the file using a bash one-liner and caclulated the crc3205:11
cr1901_modernit matches what the firmware is calculating05:11
cr1901_modernso it's an endianness problem05:11
cr1901_modernhttps://unix.stackexchange.com/a/465138 What a useful one liner05:11
tpbTitle: byte - Is there a oneliner that converts a binary file from little endian to big endian? - Unix & Linux Stack Exchange (at unix.stackexchange.com)05:11
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cr1901_modernforcefully making mkmsgimg generate little endian isn't working either05:54
cr1901_modernI dare not change the CRC code05:54
cr1901_modernit's awful05:55
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cr1901_modernHmm the --little option to mkmscimg doesn't seem to be doing anything06:13
cr1901_modernI'm taking a 15 min break to regroup06:13
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futarisIRCcloudhttps://twitter.com/ico_TC/status/105362043572685619306:42
futarisIRCcloudhttps://twitter.com/enjoy_digital/status/105693270437624217906:43
futarisIRCcloudhttps://www.digikey.com/product-detail/en/lattice-semiconductor-corporation/LFE5UM5G-85F-EVN/220-2197-ND/955390706:50
tpbTitle: LFE5UM5G-85F-EVN Lattice Semiconductor Corporation | Development Boards, Kits, Programmers | DigiKey (at www.digikey.com)06:50
futarisIRCcloudhttps://www.digikey.com/product-detail/en/lattice-semiconductor-corporation/LFE5UM-45F-VERSA-EVN/220-1963-ND/522212806:51
tpbTitle: LFE5UM-45F-VERSA-EVN Lattice Semiconductor Corporation | Development Boards, Kits, Programmers | DigiKey (at www.digikey.com)06:51
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cr1901_modernokay, somehow the image that's being written to the arty != what the FPGA is actually loading07:12
cr1901_modernI have no idea how this is possible, but it's the observed behavior07:12
cr1901_modern(Clearly this means I'm missing something lol)07:17
cr1901_modernFigured out what I was missing... also I _think_ I figured out why picorv32 wasn't booting on ice40_up5k...07:31
cr1901_modernI forgot; the BIOS is embedded in the gateware for most targets07:31
cr1901_modern_florent_: Have you ever successfully flash booted using vexriscv or picorv32 in litex-buildenv?07:51
cr1901_moderndoesn't need to be micropython; I just mean the default firmware07:55
_florent_cr1901_modern: no, i only tested with integrated bios08:14
cr1901_modern_florent_: Okay, cool. I suspect there's a nasty bug that's preventing flash boot from working08:15
cr1901_moderni.e. I don't think the SPI core knows how to handle little endian bus08:15
_florent_cr1901_modern: ah possible08:16
_florent_cr1901_modern: but it should work if you swap the written data no?08:17
cr1901_modern_florent_: Yes, but you don't know ahead of time whether the BIOS will be in an FPGA block RAM (where a swap isn't needed) or SPI flash (where a swap will be needed).08:20
cr1901_modernI supposed for the firmware payload, that's an acceptable solution though.08:22
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cr1901_modern_florent_: objcopy has a --reverse-bytes option specifically for this. I guess I'll just use that.08:24
cr1901_modernActually no, --reverse-bytes won't work specifically because of the BIOS, which is always execute-in-place, but can either be executed from block RAM or from SPI flash08:28
cr1901_modern_florent_: I still think the best solution is to add a little_endian boolean to the SPI flash controller08:29
cr1901_modernit should be simple enough to impl08:29
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_florent_cr1901_modern: https://github.com/enjoy-digital/litex/commit/468780c045da1222290bde69496852d5d3ee6e4309:27
tpbTitle: soc/cores/spi_flash: add endianness parameter · enjoy-digital/[email protected] · GitHub (at github.com)09:27
cr1901_modern_florent_: Thanks, gonna steal this for the version already in litex-buildenv09:28
cr1901_modernI assume reverse_bytes just does a Cat in opposite order?09:28
cr1901_modern_florent_: Btw, does project trellis' install directory really default to /opt?09:30
_florent_cr1901_modern: no, thanks: https://github.com/enjoy-digital/litex/commit/e9d4c882bac98d9d157371d8db4d94b4903d043e09:35
tpbTitle: build/lattice/prjtrellis: fix default toolchain_path · enjoy-digital/[email protected] · GitHub (at github.com)09:35
cr1901_modern_florent_: I'm asking mainly b/c I noticed you're using the same format as I do for the icestorm backend09:35
cr1901_modernI don't even bother w/ toolchain path, tbh; I ignore it and expect users to have icestorm on the path09:36
cr1901_modernIs that compatible with the trellis backend's behavior currently?09:36
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futarisIRCcloudhttps://github.com/blue-oil/blueoil09:42
tpbTitle: GitHub - blue-oil/blueoil: Bring Deep Learning to small devices (at github.com)09:42
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cr1901_modernGah, now we get to micropython boot, but it crashes...09:56
cr1901_modernprogress at least...09:56
cr1901_modernBoth vexriscv and picorv32 crash shortly after boot... hrm10:05
daveshahcr1901_modern: I've seen that before with micropython if the standard library is the wrong ISA variant10:07
cr1901_modernThen it shouldn't have linked, correct?10:08
cr1901_modernanyways its a rv32im10:08
daveshahNo, unfortunately it's not caught - even if the arch is specified correctly10:08
daveshahare you sure the stdlib isn't a c variant?10:08
daveshahthis would cause a crash after boot, as the initial boot messages don't need the library10:09
cr1901_modernNo, I'm not sure10:09
cr1901_modernHow could I find out... would readelf help?10:09
daveshahobjdump -d and look for 16-bit instructions?10:10
* cr1901_modern will do this in a sec10:11
daveshahreadelf on the std libraries should tell you too10:11
daveshahI see "0x1, RVC, soft-float ABI" in flags for a rv32ic lib10:11
cr1901_modernflags: 010:16
cr1901_modernoh for micropython10:16
cr1901_moderndaveshah: Which library did you check?10:18
cr1901_modernAll of these say double-float ABI10:18
daveshahI was looking at libstdc++ just randomly10:18
daveshahcan you put the full readelf somewhere?10:18
cr1901_modernhttp://ix.io/1qra10:21
daveshahflags 0x0 looks fine to me10:23
cr1901_modernI don't see any indication of compressed insns10:23
cr1901_modernThis is likely gonna be yet another a "f*** you, I'm gonna make your life hard for no reason" crash.10:24
cr1901_moderndaveshah: Btw, micropython crashes _during_ the banner10:29
daveshahah, not stdlib related then10:30
daveshahthe crash i had with that issue was immediately after the banner10:30
cr1901_modernI am starting to get tired/make "obvious" mistakes. Such as "forgetting to swap endianness when reading from SPI flash"10:31
cr1901_modernWell this is discouraging after 8 hours, neither board boots micropython, and I spent prob 3 hours of that dealing with endianness bullshit10:37
cr1901_modernHell I can't even get the stub firmware to boot on ice40_up5k_b_evn10:40
cr1901_moderndaveshah: What were your picorv32 params you used to boot micropython on ice40?10:42
daveshahcr1901_modern: various10:42
daveshahlet me find the original repo though10:42
daveshahhttps://github.com/mmicko/micropython/blob/master/ports/picorv32/rtl/picosoc.v#L11510:42
tpbTitle: micropython/picosoc.v at master · mmicko/micropython · GitHub (at github.com)10:43
cr1901_modernOkay, now there's UART activity; we get to a newline before crashing10:45
cr1901_modernbleh...10:45
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cr1901_moderndaveshah: At least for the SPI flash boot I found something wrong10:51
cr1901_modern.PROGADDR_RESET(30'd537001984)10:52
cr1901_modernThis doesn't do what I think it does10:52
daveshahwhat do you mean?10:53
cr1901_modern537001984 in hex is 0x20020000. I need to strip the bottom two bits10:53
daveshahyes, riscv is byte addressed10:53
cr1901_modernyou mean word addressed?10:54
daveshahno, the address refers to byte locations10:54
daveshahso the last two bits of the address are ignored in most cases10:54
cr1901_modernOh damnit, nevermind...10:55
cr1901_modernthis isn't gonna work either10:55
cr1901_modernI'm out of ideas for tonight10:55
nrossioh icestorm is at 666 commits... its almost 31st... coincidence??? spooky :P10:57
cr1901_modernmithro: Ngl, getting this done by Thursday is looking pretty bleak right now. Just cascade of problem (SPI flash didn't support little endian) after problem (both RV CPUs crash when booting micropython on arty) after problem (can't even get the LiteX banner to show up on ice40_up5k even _after_ correcting for the SPI flash endianness)10:57
cr1901_modernI've been at this 8 hours now, I need to break10:58
cr1901_modernNext step I guess is to do post-synth sim10:59
cr1901_modernWhich I already know is going to show no problems because it never does11:00
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cr1901_modernmithro: icebreaker arrived. Still trying to get _any_ riscv to boot to micropython. XIP on ice40 targets isn't working at all; arty BIOS works, but micropython boot crashes22:15
mithrocr1901_modern: Poke Ewen23:52
mithrocr1901_modern: Got pull requests for icebreaker as a lm32 + micropython target?23:54

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