Tuesday, 2018-08-28

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mithroCarlFK[m]: They should appear again soon00:52
mithroI believe I fixed the issue00:52
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ewenmithro: FYI, I've changed github.com/fupy organisation settings to remove "todo" bot from fupy/micropython, so we don't get drowned in upstream MicroPython todo's again (and all accidentally opened issues are now closed).01:13
mithroewen: Cool01:19
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mithroCarlFK:  https://www.irccloud.com/pastebin/KzYyuhOk/02:11
tpbTitle: Snippet | IRCCloud (at www.irccloud.com)02:11
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mithrocr1901_modern: We have definitely proven that _florent_'s https://github.com/enjoy-digital/tinyfpga-soc works on the TinyFPGA-BX with some small modifications02:21
tpbTitle: GitHub - enjoy-digital/tinyfpga-soc: TinyFPGA SoC based on LiteX (at github.com)02:21
ewenmithro: FYI, Mimas V2 LEDs (on lm32) seem to still work with current litex-buildenv and fupy/micropython02:24
mithroewen: Awesome!02:25
CarlFKmithro: how can I run the pep8 test locally?03:01
mithroThere is a make target03:34
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cr1901_modernmithro: Does this include with spiflash?09:08
cr1901_modernAlso please note that a truly minimal lm32 doesn't have mul/div/multishift insns09:08
cr1901_modernwhich Idk if litex accounts for when generating Makefile flags09:08
cr1901_modern>doesn't have mul/div/multishift insns10:32
cr1901_modernIgnore this, just actually read the source. I still think the minimal lm32 should have an i-cache though10:32
cr1901_moderncc: _florent_10:32
cr1901_modernThe idea is that designs using tinyfpga and ice40 SoCs will typically be reading from an external flash (assuming I ever get the damn thing to work)10:35
cr1901_modernif you don't have a cache, then there's no reason to use a pipelined CPU b/c the pipeline will never be filled due to throughput from SPIflash10:36
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cr1901_moderntinyfpga: This is a stupid question, but... are bitstreams for B2 supposed to work for BX unaltered?14:02
tinyfpgacr1901_modern: the connections between the FPGA pins and pins on the board are completely different14:14
tinyfpgacr1901_modern: the clk is connected to a different pin as well14:14
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cr1901_moderntinyfpga: Very good :D Small wonder why stuff isn't working17:35
tinyfpgacr1901_modern: XD17:35
tinyfpgacr1901_modern: you probably know this already, but this is a pin constraint file for the B2: https://github.com/tinyfpga/TinyFPGA-B-Series/blob/master/icestorm_template/pins.pcf17:36
tpbTitle: TinyFPGA-B-Series/pins.pcf at master · tinyfpga/TinyFPGA-B-Series · GitHub (at github.com)17:36
cr1901_modernI need a pcf for BX actually17:37
tinyfpgacr1901_modern: and this is for the BX: https://github.com/tinyfpga/TinyFPGA-BX/blob/master/icestorm_template/pins.pcf17:37
tpbTitle: TinyFPGA-BX/pins.pcf at master · tinyfpga/TinyFPGA-BX · GitHub (at github.com)17:37
cr1901_moderntinyfpga: The user LED on BX is _not_ attached to one of the pins, correct?18:30
cr1901_modern(what about the boot LED?)18:30
cr1901_modern(And lastly: Which pins, if any, are inputs only?)18:34
tinyfpgacr1901_modern: user LED is the boot LED, it’s available on the bottom of the board. It’s labeled LED18:54
cr1901_modernoh right. oops18:56
cr1901_modernOn tinyfpga B the last pin IIRC is an input-only pin18:57
cr1901_modernAnd it looks like on tinyfpga BX we have a Quad spi flash?18:58
tinyfpgacr1901_modern: yes, QSPI, but you have to enable it19:00
tinyfpgacr1901_modern: there’s a specific bit in the Adesto SPI flash chips for QSPI...I forget the exact bit off hand19:01
cr1901_modernio0 = miso, io1 = mosi?19:01
tinyfpgacr1901_modern: CLK is the only input only pin19:02
cr1901_modernExcellent, this is different from B2, but I can't remember _where_ I read it19:02
cr1901_modernAt least I have a comment: # E8, Pin 20 (Input only)19:03
tinyfpgacr1901_modern: https://datasheet.octopart.com/AT25SF081-SSHD-B-Adesto-Technologies-datasheet-31984108.pdf19:07
cr1901_modernDebugging spi flash problems is going to be interesting on BX... I'll have to route the SPI flash bus out to GPIO lol19:09
cr1901_modernwhereas on B2 that was already done for me19:09
cr1901_modernI _really_ hope the upgrade to BX fixes stuff19:09
tinyfpgacr1901_modern: the SPI flash pins are on the bottom of the board as well19:27
tinyfpgacr1901_modern: just solder some short wires onto them19:28
cr1901_moderntinyfpga: usb_pu == pullup, correct?20:44
tinyfpgacr1901_modern: correct20:52
tinyfpgacr1901_modern: if your not using usb tie it to ‘0’ in your Verilog top level20:53
cr1901_modernOkay cool... on that note, the platform file for tinyfpga BX is filled out. But I'm not quite ready to submit it as a PR yet.20:57
cr1901_modernI plan to do it by tonight20:57
cr1901_moderntinyfpga: The default addr of the second bitstream on BX is still 0x30000 right?21:54
cr1901_modernfascinating, I can't get any bitstream from migen to work yet (PCF looks correct)21:54
cr1901_modernTime for a classic blinky and see what happens...21:55
cr1901_modernOkay a generic blinky doesn't work, so I royally screwed up somewhere :)22:01
tinyfpgacr1901_modern: it’s not the same address22:03
tinyfpgacr1901_modern: run tinyprog -m22:03
cr1901_modernI really hope I didn't overwrite the bootloader...22:03
cr1901_modern(I don't think I did tho)22:03
tinyfpgacr1901_modern: it will show you the address map in JSON format22:03
tinyfpgacr1901_modern: when you program a bitstream, you can use the -p option with no address22:04
tinyfpgacr1901_modern: tinyprog uses the metadata to know where to put the bitstream22:04
cr1901_moderndoes the command line app accept hex values?22:04
tinyfpgacr1901_modern: when you program the user data (assembly code or other random data) use the -u option22:05
tinyfpgacr1901_modern: use 0x000000 format numbers for hex22:05
cr1901_modernpraise the lord, I was sorely missing that feature lol22:05
tinyfpgacr1901_modern: you can use both the -p and -u options to program both the user bitstream and user data in one go22:05
cr1901_modernAaaand I just bricked it :)22:06
cr1901_modernBahahahahaha XD22:06
tinyfpgacr1901_modern: if you did, that’s partly my fault....I need to add a mechanism in tinyprog to prevent users from accidentally overwriting the bootloader22:07
cr1901_modern"-a 0x28000" Does NOT work on the command line. You will brick it22:07
cr1901_modernIt's not a huge deal, but I only have one FTDI breakout board and no SOIC clips22:08
cr1901_modernSo I could in theory be back up and running in an hour, assuming I can get my FTDI programmer to behave22:09
cr1901_modern(and find a decent SPI flash writer application)22:09
tinyfpgacr1901_modern: that should work just fine on the commandline...you are using tinyprog, right?22:09
cr1901_moderntinyfpga: http://ix.io/1ltj22:11
cr1901_modernAt least this will make a fun bug report22:11
cr1901_modernExpected Behavior: Programmer Application Will Not Brick Device22:11
cr1901_modernActual Behavior: Programmer Application Overwrote Bootloader22:12
tinyfpgacr1901_modern: ohh jeez22:12
tinyfpgacr1901_modern: whelp, I’ll be fixing that and adding a safety check for the bootloader22:14
tinyfpgadon’t worry cr1901_modern, for all your troubles I will give you a free TinyFPGA EX board22:14
tinyfpgacr1901_modern: so you can get it working on litex as well XD22:14
cr1901_modernWell thanks :), but in this case I'm laughing in meatspace. I really can't be angry; it was only a matter of time22:15
cr1901_moderntinyfpga: https://github.com/tinyfpga/TinyFPGA-Bootloader/issues/19 I have filed an issue22:21
tpbTitle: Hex Literals are converted to Decimal on `tinyprog` command line, and `tinyprog` bricks device. · Issue #19 · tinyfpga/TinyFPGA-Bootloader · GitHub (at github.com)22:21
cr1901_modern(Is it okay if I tweet this? I'm not actually upset, I find this funny!)22:23
CarlFKtinyfpga: do you want more people interested in tinyfpga?22:24
CarlFKthat's what will come out of this.22:24
cr1901_modernIs multiboot.bin the bitstream for the bootloader?22:26
tinyfpgacr1901_modern: go ahead and tweet away :)22:26
tinyfpgacr1901_modern: it’s the stage 2 url from here: https://github.com/tinyfpga/tinyfpga.github.io/blob/master/update/tinyfpga-bx/bootloader.json22:26
tpbTitle: tinyfpga.github.io/bootloader.json at master · tinyfpga/tinyfpga.github.io · GitHub (at github.com)22:26
cr1901_modernwhat is multiboot.bin then? :o22:27
tinyfpgacr1901_modern: I believe multiboot.bin from the bx bootloader makefile should be the same thing22:27
tinyfpgacr1901_modern: https://github.com/tinyfpga/TinyFPGA-Bootloader/blob/master/boards/TinyFPGA_BX/Makefile22:28
tpbTitle: TinyFPGA-Bootloader/Makefile at master · tinyfpga/TinyFPGA-Bootloader · GitHub (at github.com)22:28
tinyfpgacr1901_modern: umm...I think that maybe multiboot.bin is an accident....I don’t think it’s supposed to be in there22:28
cr1901_modernWhy is the bootloader on the board twice?22:28
tinyfpgacr1901_modern: the makefile builds fw.bin22:28
tpbTitle: TinyFPGA-Bootloader/Makefile at master · tinyfpga/TinyFPGA-Bootloader · GitHub (at github.com)22:29
tinyfpgacr1901_modern: the second copy is just the user bitstream22:29
tinyfpgacr1901_modern: it gets overwritten when you program your own bitstream22:29
cr1901_modernoh right, I just figured it was unnecessary to have that step. Maybe not :P22:29
tinyfpgacr1901_modern: I just needed a second bitstream for icemulti tool22:29
tinyfpgacr1901_modern: there are probably other ways to solve that problem22:30
* cr1901_modern thinks about how to solve his immediate problem22:30
cr1901_modernSomehow I think testing stuff isn't happening tonight22:31
tinyfpgacr1901_modern: if you want, I can send you a new board and you can send me back the bricked one22:32
tinyfpgacr1901_modern: ill include a return label22:32
cr1901_modernNahh, it's fine, but thanks for the offer. Maybe it'll make a decent blog post or something22:33

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