Monday, 2018-08-27

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cr1901_modernmithro: I tried a "VexRiscv-Lite" I created on tinyfpgab... as is par for the course, I don't get any activity, even w/ _florent_'s minimal soc01:02
cr1901_modernTime to simulate I guess...01:05
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_florent_cr1901_modern: what's your "VexRiscv-Lite"? is it a specific vexrsicv verilog you generated to reduce resource usage? If you share it, i'll do some tests05:44
cr1901_modern_florent_: It can be found here on this branch:
tpbTitle: GitHub - cr1901/VexRiscv-verilog at lite (at
cr1901_modernAnd yes, it's a variant explicitly to reduce resource usage05:53
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cr1901_modernI'm not ready to share the SoC it's part of though; you'll need to reduce the integrated_rom_size of your tinyfpga-soc to 0x1800 for all the block RAM to fit05:54
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_florent_cr1901_modern: thanks, have you been able to test it on another board (a Xilinx one?)06:06
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cr1901_modern_florent_: No, not yet06:16
_florent_cr1901_modern: if you want an easy way to test configurations, you can use the simulation: in litex/boards/targets, run ./ --cpu-type=vexriscv06:46
_florent_cr1901_modern: and you replace the VexRiscv.v in litex/soc/cores/cpu/vexriscv/verilog with your generated file06:46
_florent_cr1901_modern: the VexRiscv-Lite.v is working in simulation06:47
_florent_cr1901_modern: i'm going to test in arty06:47
_florent_cr1901_modern: it's working on arty.06:51
ewenmithro: Appears we can upgrade FuPy to modern micropython:06:55
ewenExecuting booted program at 0x4000000006:55
ewenMicroPython v1.9.4-509-gf4e8a40-dirty on 2018-08-27; litex with lm3206:55
ewenmithro: or if we just pull forward rather than rebase06:58
ewenExecuting booted program at 0x4000000006:58
ewenMicroPython v1.9.4-513-gc6fb8fc-dirty on 2018-08-27; litex with lm3206:58
ewenFTR, key trick to getting v1.9.4-... version numbers is that we must grab the v1.9.4 tag from the upstream and push it up to our repo.06:58
ewen(otherwise git describe will report v1.8.7-NNNN-.... with a huge number of commits, which is rather misleading.)06:59
ewenmithro: pull forward is probably better, which is currently only at
tpbTitle: GitHub - ewenmcneill/fupy-micropython at ports-fupy (at
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xobsIn case anyone is following along at home, I managed to port Coriolis to run on Ubuntu 18.04, including porting it to Python3.  I still can't /do/ anything with it yet, since I'm trying to figure out how to get yosys to synthesize something it'll accept.
tpbTitle: GitHub - xobs/coriolis: An alternative PnR system, or at least an attempt to modernize it. (at
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twoolieI have the LM32 booting on TinyFPGA-BX with _florent_'s tinySOC07:36
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ewenmithro: third_party/edid-decode is causing me pain trying to push to my own repo, even after cherry-picking the URL change from your branch, "git submodule sync", "git submodule update --recursive".07:50
ewenThe following submodule paths contain changes that can07:50
ewennot be found on any remote:07:50
ewen  third_party/edid-decode07:50
ewenmithro: is there some step I'm missing in how to make it happy again?07:50
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ewenmithro: Finally fixed my thirdparty/edid-decode issue by (a) cherry-picking your submodules update (as well as the edid-decode git repo location change) *and* (b) rm -rf .git/modules/third_party/edid-decode third_party/edid-decode && git s08:49
ewenubmodule sync && git submodule update --init --recursive08:49
ewen(all one command: ie ... && git submodule sync && git submodule update --init --recursive)08:49
ewenIt appears edid-decode managed to diverge the git trees after moving locations, just to make it extra specially difficult.08:49
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ewenFTR, has a cherry-pick of the two submodule updates from #34, in case we can merge them separately from everything else.09:21
tpbTitle: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at
ewenPlus a note of what needs to be done when merging/pulling that to get thirdparty/edid-decode back to a sane state.09:22
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mithroewen: poke _florent_ about that error with the MimasV210:30
mithroewen: it looks like an issue in LiteDRAM -
tpbTitle: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at
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ewen_florent_: After updating litex modules in litex-buildenv (with the updates mithro had), building litex-buildenv on Mimas V2 breaks, very early in the build, in
ewen_florent_: Output of build attempt is in
tpbTitle: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at
ewen_florent_: Do you have any ideas of root cause (appears something is not defined, but I'm unclear why).  Builds okay on the Arty platform.11:26
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_florent_mithro, ewen: i'm looking at that12:03
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cr1901_modern_florent_: At this point, I'm wondering if icetime is lying about all the cores (lm32, vexriscv) passing timing16:58
daveshahIt will do that if they have any negative edge clocks17:02
CarlFKdaveshah: what version did you flash opsis?  you just did this, right?17:05
daveshahNever used an opsis in my life17:05
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CarlFKah different D.20:58
CarlFKdeeprave: what firmware version did you flash?20:59
tpbTitle: LiteX Build Environment - FuPy - Relationship - Google Drawings (at
cr1901_modernWhat is Zephyr?22:50
mithrocr1901_modern: The IoT platform you use when you really wanted Linux but couldn't make it small enough22:51
cr1901_modernWell I never wanted to use Linux on IoT, so...22:51
cr1901_modernI guess maybe Zephyr is for me?22:51
mithrocr1901_modern: Zephyr is backed by the Linux Foundation23:04
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CarlFKmithro: can you look into why there aren't any hdmi2usb builds in so long?23:31
CarlFKalso, I have a PR against - was just banging on it in the last day or so.23:32
CarlFKreloacint to PS1 for nerp night with pdp11 - see ya23:41
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