Friday, 2018-08-03

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xobsmithro: Nice list.02:22
xobsI'm curious to see if lxbuildenv would work on OS X.  Does anyone have access to a Mac?02:26
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CarlFKxobs: do you (mac owner) need to do anything as root?02:28
xobsCarlFK: I'm not sure.  I think the big requirement is git, which I don't think is installed by default.02:29
CarlFKis there a 'start here' url?02:30
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xobsHere's the quickest start I could come up with.  It checks out a basic project, downloads dependencies, and checks to see if the verilog file was created:
tpbTitle: Quickstart for Testing · xobs/ws2812b-catcher Wiki · GitHub (at
xobsI mean, it'll fail, but the test is whether build/top.v exists.02:37
CarlFKI'll go fishing for  a mac02:52
mithroxobs & tinyfpga - you should chat :-P02:53
xobstinyfpga: hello03:18
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xobsI'm trying to come up with a BusFault responder for Wishbone to prevent it from locking up when addressing an invalid address.  Basically, trying to solve
tpbTitle: Accessing unmapped Wishbone address freezes system · Issue #82 · enjoy-digital/litex · GitHub (at
xobsI'm trying to solve the issue without using eval().  What I'd like to do is set a value to "master.cyc & ~(" + "|".join(slave_sel) + ")".  How would I do that in Python?09:14
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xobsOkay, I added a simple busfault handler.  I'll get bunnie to test it:
tpbTitle: interconnect: wishbone: add simple busfault handler · xobs/[email protected] · GitHub (at
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felix_xobs: i have a mac and i could test some stuff. however my machine's software is far from the default configuration...12:00
xobsfelix_: I'd almost consider that a feature.12:02
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mithroxobs: I either had a really awesome or really terrible idea last night14:56
mithroxobs: I think it will probably give us what we want with LiteX-BuildEnv14:56
xobsmithro: What's the idea?14:57
mithroxobs: Let me quickly write it up15:00
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mithroxobs: Okay - I have something written up15:39
tpbTitle: Google Docs - create and edit documents online, for free. (at
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