Friday, 2018-06-29

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cr1901_modernunlike the icestorm bitstream, this one doesn't have any activity at all from the CPU, except the spiflash clock is toggling00:03
mithrocr1901_modern: Question - does MiSoC / LiteX with the RISC-V based CPU work on the ice40?01:04
cr1901_modernmithro: PicoRV32 should, but I haven't tried vexriscv01:06
cr1901_modern(Well more accurately, I haven't tried either)01:09
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mithroSo close to the 100T goal -> - 20 hours to go....03:59
tpbTitle: NeTV2 - Second and Third Stretch Goals | Crowd Supply (at
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xobsWow, I had no idea it was so close. It's a really nice part!04:09
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cr1901_modern mithro04:31
cr1901_modernit passed 60,000 :D04:31
tpbTitle: NeTV2 | Crowd Supply (at
CarlFKoh great, now I have to buy fans or something :p04:33
cr1901_modernI want it, but... I can't justify the price for features I can't really use right now (on Windoze and too many other things going on right now)04:38
cr1901_modernIt prob is a bargain tho04:38
CarlFKcr1901_modern:  "Orders placed now ship May 31, 2019."  so you have plenty of time to  get ready :D04:41
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cr1901_modern100T FPGA is only avail during the crowdfund period tho04:50
cr1901_modernmeaning I have 18 hours left to decide whether I want $300 to pay off in nearly a year :)04:50
futarisIRCcloudI know that feeling too. Bare PCB, $300...04:51
xobscr1901_modern: I'm doing all my development on Windows.04:57
xobsWindows-Windows even.  Not Bash-on-Windows stuff.04:58
cr1901_modernAhhh well, price point still applies :P05:01
rohitksingh_workcr1901_modern: Indeed. I saw xobs doing things with Windows which I had assumed were just not possible :p05:01
xobsAdmittedly, I'm running my openocd<->etherbone bridge under Bash-on-Windows, and running openocd-riscv under Bash-on-Windows, but synthesis, compiling, and gdb are all native Windows programs.05:02
cr1901_modernxobs: I meant the PCIe portion specifically05:03
cr1901_modernThe hoops you have to go through to do FOSS driver devel on Windows is (how do I put this nicely?) garbage05:03
cr1901_modernbasically it's not possible unless you have a nice chunk of money or you use libwdi in un(der)documented arcane ways05:04
xobsThat I'll grant you.  The driver signing stuff is not so good or convenient.05:04
xobsI wonder how I'll solve that problem myself...05:04
xobsHow /do/ you do PCIe development?  Does PCIe rescanning actually work on x64 Linux?05:08
xobsNow I'm almost wishing I had a machine that was capable of Thunderbolt.05:09
cr1901_modernIdk, I've not done PCIe devel (nor have I used Linux for any serious work in 6.5 years now)05:11
xobsOverall I'd imagine Intel devices are much better to develop on PCIe.  I know the Synopsis core on Novena would lock up the whole system if you even looked at it funny.05:30
xobsNow I'm sitting here wondering if I should do a USB3.0<->PCIe bridge board using the USB3380...05:32
* rohitksingh_work laughed out loud on the Synopsis PCIe core tidbit 05:43
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cr1901_modernAnd here I'm struggling debugging something literally 100 times slower06:05
cr1901_modernbut runtime-crashes two different toolchains06:05
cr1901_modernalso, my FM synth kit arrived and doesn't work, and this makes me sad06:06
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felix_xobs: just plug the card into another box and test the driver remotely. especially when developing and testing dma stuff, it's a rather bad idea to plug the card into the computer you're doing development on10:01
felix_if the bar sizes don't change,it might be possible just to set the bars to the state before the fpga reconfiguration, but i just wrote some script that reconfigures the fpga on the remote box, builds the kernel module via dkms, reboots the box and then runs some tests10:03
xobsfelix_: That sounds most reasonable.10:03
xobsfelix_: Relatedly, while you're here, is there any way to update a CSR when it's read, or only when it's written?  I've created a VexRiscV module that has an "Update" register you write to in order to force a synchronization.10:04
felix_uh, i don't know. maybe ask _florent_ ?10:06
felix_the script i wrote for a customer basically uses scp to push the files to the test system and ssh to run commands on the test system. the usb jtag is also connected to the test system and i use openocd to push the image into the fpga10:08
xobsfelix_: Right, I'm sorry. Juggling too many things right now.10:08
felix_no worries; i also have too many things that need to be taken care of at the moment ;)10:09
xobsI'm working on the NeTV2 at the moment, trying to get in-circuit debugging working reliably.  And learning about the joys of migen.  It works rather well.10:10
felix_for the tests i push a folder to the test machine with a makefile and the makefile just gets run and i get its stdout back via ssh10:10
xobsfelix_: Neat.  And this is all done via a remote x64-type machine with the actual hardware in it?10:11
felix_the fpga card is plugged into the test box and the ssh pubkey of my development machine is in the authorized keys of the root user on the testing machine and i just run the script on the development machine and pass the bitstream, the dkms folder and the test folder as arguments to the script that does all the poking of the test machine via scp and ssh10:13
felix_can't publish the script, but that stuff was rather straightforward to implement10:13
felix_"openocd -f board/kc705.cfg -c init -c "pld load 0 bitstream.bit" -c exit" is the openocd command that works for basically all 7 series devices10:14
felix_ah and you need a not too ancient openocd version on the testing machine10:15
felix_with an ssd in the test system, the reboot takes about 12 seconds, so i just didn't try to reinitilize the pcie config space of the fpga10:18
xobsI seem to recall FPGA configuration was one of the tricky bits in NeTV2 development, and why Bunnie was looking to do QSPI.10:19
felix_for testing i just push the configuration in the fpga via jtag and don't touch the flash10:19
felix_the fpga keeps its config during a reboot10:20
felix_and writing the flash probably takes longer than only configuring the fpga10:20
felix_btw: this is what i'm currently working on - the non-prototype sdi board for the apertus axiom beta (well, thats what i looked like two days ago, but i spent yesterday setting up some other stuff)10:22
felix_kicad got much better in version 5, but i still hit some bugs. oh and some of the package footprints from the library are just unusable :/10:24
felix_i have to go to my office now to continue working on that10:24
xobsNeat!  I look forward to the v5 general release.10:25
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_florent_xobs/felix_: for pcie dev, i'm also using a remote computer and rsync/ssh. Also only load the bistream in sram and reboot. That works fine.10:56
_florent_xobs: regarding the CSR, you are not able to know it is read. It can be useful in some case, but it's probably safer to use a specific write to trigger some actions than a read.10:59
_florent_xobs: the tricky things for PCIe&FPGA is that you need to configure the FPGA in less than 100ms after power on. (not sure this is really true, but at least that's what the standard says...)11:02
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CarlFK[m]Now I am wondering if I should upgrade or get 2 more of the limited edition better ones.  Even though I don't know why I need it16:55
CarlFK[m]I got 2 of each because I want 4 for hdmi2usb and mithro said I should get one of the better ones.16:55
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