Monday, 2018-06-25

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xobsQuestion about the litex stuff: It looks like CSRs are expanded so that each 8-bit offset is a 32-bit address.  What's the reason for that?08:01
xobsE.g. a Signal(32) that gets placed at offset 0x10000000 requires an 8-bit Wishbone write at 0x10000000, 0x10000004, 0x10000008, and 0x1000000c, rather than a single 32-bit write at 0x10000000.08:02
xobsRelatedly: When is the register actually updated?  Is it when the high byte is written?08:52
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xobsAlso relatedly: I've managed to figure out the etherbone packet format, and have an adapter now to enable riscv64-unknown-elf-gdb to talk to the soft core.  Breakpoints don't work yet, though...11:04
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futarisIRCcloudxobs: I'd ping florent, and ask him directly about the 8-bit offset stuff on Wishbone.23:46
futarisIRCcloudxobs: Great. Now we can run gdb over ethernet?23:47

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