Thursday, 2018-06-21

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rohitksingh_workcr1901_modern: ping?08:58
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nancy98[m]mithro ping ! Can we please have a meeting regarding the project !14:26
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mithronancy98[m]: It seems unlikely we can make a time work at the moment - do you want to send an email?17:04
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cr1901_modernrohitksingh: Pong18:10
rohitksinghcr1901_modern: you are much more familiar with migen. could you please take a look at this line:
tpbTitle: migen/ at master · m-labs/migen · GitHub (at
cr1901_modernPhew, ngl... I forget how this works and I had the same question as you at one point :P18:16
rohitksinghit seems to me that the, self._pong.i expects input signal in 'odomain' whereas self._ping.i signal is in 'idomain' clock domain18:16
cr1901_modernrohitksingh: This'll take me a bit to (re)study18:16
rohitksinghcr1901_modern: oh sure, no issues...I remembered you had used CDC in your frequency counter ip project, so thought to ask you :)18:18
cr1901_modernrohitksingh: I usually use a asyncFIFO for multi signal CDC18:19
rohitksinghcr1901_modern: oh okay...even  _florent_ seems to have used BusSynchronizer only in dram bist core, and no where else...I'm not sure whether that highlighted line is correct18:20
cr1901_modernMy issue w/ BusSynchronizer _IIRC_ is that it's difficult to predict latency of when the value in the source will finally propogate to the dest domain18:21
rohitksinghyup that too! there is no way to know when the value will propagate, and there are no handshake signals18:22
cr1901_modernB/c there's a "token" loop between source and dest that's multiple taps long (think like a ring buffer), and src and dst can only send/rcv values when the token is in the right position18:22
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