Thursday, 2017-12-28

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cr1901_modernmithro: Gonna have to sim this when I wake up, but there seems to be two issues w/ tinyfpga CPU right now:06:49
cr1901_modern1. ice40 FPGAs put the flash into deep sleep before xferring control to the user program06:49
cr1901_modern2. The first fetched address looks like it's garbage (see picture)06:49
tumbleweedxfxf: I just finished my registration, without accomm, I assume that's right09:45
xfxfthat's correct10:56
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nablahi There tim16:27
CarlFKmithro: ^^^16:28
CarlFKand hello nabla16:29
nablaIm Alex, I just came by today to ask a few questiones thanks for the help and points to look at16:29
mithronabla: Cool!16:29
nablafriend of Ducky16:29
nablaand of Felix16:29
nablaThanks again16:39
nablaWhat is project IceStorm16:41
nablaand I presume that all the letter and number combinations are the Part numbers16:42
mithronabla: Project IceStorm is the first open source FPGA toolchain for the Lattice iCE40 FPGAs16:59
mithroIt takes Verilog (a HDL) and compiles it down to stuff you can load onto FPGAs17:00
nablaah so is that done or is it also in development17:00
nablaah ok17:00
mithronabla: That works, we are now working on SymbiFlow to extend this to work with Xilinx Series 7 FPGAs17:04
nablaThe approach of both is the black box method17:04
mithroI believe so17:04
cr1901_modern_florent_: Are you awake?17:30
CarlFK  $20  works with thinkpad yoga v218:02
CarlFK USB-C to HDMI and USB-C (F) so it can be powered18:04
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