Saturday, 2017-04-15

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futarisIRCcloudHad a quick play with serial irq etc this morning. Can't get the interrupt to happen on the linux side. Moved IRQ in QEMU and linux to int 2, as int 0 gives some problems in linux.01:11
futarisIRCcloudLooks like we'll need to follow what serial.c does in qemu. serial_mm_init is the function used for qemu openrisc_sim ... Emulates a 16550 UART with IRQ, on IRQ 2 in linux.01:12
futarisIRCcloudHeading out now, and might be able to look at this again later this afternoon / tonight.01:12
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mithrofutarisIRCcloud: I'll look at fixing QEmu after lunch04:28
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futarisIRCcloudmithro: How'd you go with the qemu-litex changes?08:26
mithroI got distracted by the spiflash08:26
mithroI can look at it now if you want08:26
futarisIRCcloudOk. If we can just get irqs happening from qemu, then I can fix up tx and then rx after that.08:29
mithrofutarisIRCcloud: Okay - Looking at the Python code what you mentioned is almost right08:37
mithrofutarisIRCcloud: The EV object generated 3 registers08:38
mithrofutarisIRCcloud: CSR_UART_EV_STATUS == current state of the IRQ08:38
mithrofutarisIRCcloud: CSR_UART_EV_PENDING == if the IRQ fired since last being cleared08:39
mithrofutarisIRCcloud: CSR_UART_EV_ENABLE == if the IRQ will fire08:39
mithrofutarisIRCcloud: So the idea is that normally you set the TX IRQ as non-firing, when the TX buffer gets full you set the TX IRQ to fire and wait for that before sending more bytes08:40
futarisIRCcloudYeah, I looked at how the bare metal isr handled it.08:41
mithrofutarisIRCcloud: So, if you just want RX IRQs, you should write to the ENABLE register08:44
* mithro goes to see what is implemented in QEMU08:45
futarisIRCcloudYeah. But we'll need a way of resuming tx when the fifo is full. Which means implementing a timer or waiting for a tx irq.08:45
mithrofutarisIRCcloud: Yes, you can unmask the TX IRQ once the fifo is full08:46
futarisIRCcloudMithro: Yep. I'm just trying to get the irq to happen in Linux. Just for tx first. An rx irq could be used to resume printing first, I guess.08:48
futarisIRCcloudFor qemu, we can just emulate an unlimited depth tx fifo, and it should just work with the Linux driver. Or you can implement a real tx_fifo.08:52
mithrofutarisIRCcloud: So it doesn't look like the IRQ is getting through from the peripheral09:17
mithroThe peripheral code seems to be raising it correctly but it's never getting to openrisc_pic_cpu_handle function09:18
mithroOkay, I fixed it...09:34
mithrofutarisIRCcloud: poke?09:37
mithrofutarisIRCcloud: Turns out that I was using the IRQs before initalizing them...09:38
futarisIRCcloudAh. That'd do it.09:40
mithrofutarisIRCcloud: Pushed09:40
futarisIRCcloudGreat. Have to fetch it from rather than timvideos. I pushed your earlier changes onto timvideos.09:47
mithrofutarisIRCcloud: Pushed to the timvideos repo too now09:48
mithrofutarisIRCcloud: That help?09:52
futarisIRCcloudWorking on it.09:52
futarisIRCcloudShould I should be on 'master' or 'linux-hacks' branch?09:56
mithrofutarisIRCcloud: linux-hacks just has the reset location hard coded to 0x400010009:56
futarisIRCcloudqemu-litex/hw/openrisc/litex.c:39:27: fatal error: ../generated/csr.h: Too many levels of symbolic links10:10
futarisIRCcloudWith a clean build/opsis_base_or1k directory.10:11
mithrofutarisIRCcloud: Hrm?10:11
futarisIRCcloudRedoing scripts/ again.10:13
futarisIRCcloudOk. My bad. I accidentally, did export TARGET=BASE rather TARGET=base ...10:15
futarisIRCcloud"qemu-system-or32: Trying to execute code outside RAM or ROM at 0x00008000 "with branch 'master'10:20
futarisIRCcloud'linux-hacks' works.10:21
futarisIRCcloud'linux-hacks' already had that change from 'master' ...10:38
mithroWTF is going on in this file!? :-P11:31
tpbTitle: Linux/drivers/gpio/gpio-mmio.c - Linux Cross Reference - Free Electrons (at
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