Monday, 2017-02-06

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xfxfmithro: poke, sent you a message on hangouts.  need to get these reimbursements done10:55
_florent_cr1901_modern: IIRC you were working on porting J-Core to MiSoC or LiteX, just curious to know how it's going on? (I discussed with someone that was interested by the J-Core)11:34
cr1901_modern_florent_: My intentions are porting it to both MiSoC and LiteX (I think sb0 woud accept this port). I'm still currently studying the code/learning VHDL and compiling the toolchain, which is more difficult than lm32 or RISC-V12:21
cr1901_modernmore difficult to compile*12:21
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_florent_cr1901_modern:  ok thanks13:18
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cr1901_modern_florent_: After j-core, LiteX will have a sample of all the existing free (pipelined) CPU cores, AFAIK :)13:32
_florent_cr1901_modern: probably :)13:33
_florent_cr1901_modern: is it a wishbone interface on the j-Core?13:34
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cr1901_modern_florent_: I'll have to add a bridge for wishbone17:13
mithroGod I hate cmake18:02
CarlFKmithro: it is 5am you should be hating everything right now.18:04
mithroCarlFK: I'm in the US18:04
CarlFKmithro: oh neat.  mtv?18:05
CarlFKI have a $150 camera battery I need to get to xfxf in the next few months, and shipping batteries is.. annoying.18:06
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