Tuesday, 2017-01-03

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tumbleweedmithro: I submitted some monitors to edit.tv, but it doesn't seem to be parsing some correctly19:12
tumbleweedhttp://edid.tv/edid/136/ (and 135) are 2560x1440 panels, but only displaying as [email protected]19:13
tpbTitle: Details - EDID.tv (at edid.tv)19:13
mithroIt probably needs some love19:14
tumbleweedalso, the xrandr paste mode doesn't work19:14
tumbleweedbut hex does, given a hex section extracted from xrandr output19:14
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cr1901_modernmithro: So I stripped mimasv2 to the bare minimum, using the simple.py target in MiSoC (sic). Even that target has a broken UART19:52
cr1901_modernbut the firmware does run without crashing, so there's that.19:53
mithrocr1901_modern: Are you sure you are using the uart at the right baud rate?19:53
cr1901_modernmithro: Yes, I manually patched simple.py to use 1920019:53
cr1901_modernUART tends to skip a number of characters19:53
mithroI'm 100% sure I had the LiteX SDRAMSoC running with the BIOS booting from block ram19:54
cr1901_modernWell, even that crashed for me :(19:54
cr1901_modernSo the next step is to keep adding components until it breaks. The reverse of Muntzing. I don't think simulation is going to help here, but I've also batted around adding a JTAG bridge19:55
cr1901_modernOr just manually connecting via OpenOCD19:55
tpbTitle: HDMI2USB-litex-firmware/base.py at f33e2bd88b12d2e804aef3680442f511ca6a9c29 · mithro/HDMI2USB-litex-firmware · GitHub (at github.com)19:56
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cr1901_modernmithro: Trying now20:06
cr1901_modernerm, compiling now20:06
cr1901_modernOkay, something very interesting just happened w/ compile times20:20
cr1901_modernsince checking out that file, and that file alone, compile times went to 700s instead of 400s20:20
cr1901_modernmithro: I can confirm w/ that image that the device no longer crashes, but the UART is still completely screwed up20:27
cr1901_modernI stashed "my" copy of the gateware that didn't work/crashed, so I can do a diff to see what's different. But first I need to figure out what the hell's up with the COM port...20:28
mithrocr1901_modern: How are you connecting with flterm?20:28
mithrocr1901_modern: are you specifying the baud rate to flterm correctly?20:29
cr1901_modernmithro: I'm using PuTTY :P20:29
mithrocr1901_modern: Have you turned off flow control?20:29
cr1901_modernflow control is off20:32
cr1901_modernno change20:32
cr1901_modernEvery few characters is skipped20:32
cr1901_modern(now it can't be the uart b/c the FPGA wouldn't have booted if it failed)20:33
cr1901_modern_florent_: What Putty options do you use? Or does flterm work on Windows?20:34
mithrocr1901_modern: can you try flterm?20:35
cr1901_modernmithro: Tried it, same problem21:03
cr1901_modern(additionally, flterm appears to like to poll without sleeping, so it will max out a core)21:03
cr1901_modernmithro: Now what I *CAN* do is replace with a dummy UART that just spits stuff to the screen21:04
cr1901_modernand check to see if there's the same problem. If so, I wonder if the PIC doing the UART is broken21:04
mithroWell, getting on a ~20ish hours of flights now21:04
mithroBe back in a day or two21:05
cr1901_modernmithro: I'll be hacking away and seeing what I can do :)21:05
cr1901_modernTry to get some rest21:05
mithroThat version probably still has the CPU running at 85MHz21:32
cr1901_modernmithro: It does. That shouldn't have changed anything21:53
cr1901_modernunless you dialed down the clk freq when testing21:53

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