Thursday, 2016-12-22

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tumbleweedCarlFK: atlys + C2 layout:
CarlFKtumbleweed: huh.  using the existing holes?  I don't remember finding a way the C2 would mount cleanly like that.06:34
tumbleweedCarlFK: it's not perfect06:48
tumbleweedif I wasn't using plastic standoffs, there'd be too much strain06:48
CarlFKah got it.07:06
CarlFKtoo bad they didn't make the holes the same pattern as HDs07:06
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mithrotumbleweed: got some more pictures of that?09:29
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tpbTitle: LectureSight Project Home - LectureSight - Opencast Projects Wiki (at
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tumbleweedmithro: grabbed some more pics.
tumbleweedand that's all your getting, becuase I'm on a plane now14:19
tumbleweedCarlFK: ^^14:19
CarlFKtumbleweed: thanks - have a safe flight14:34
mithrocr1901_modern1: I'm around for a bit now if you have any questions14:40
cr1901_modern1mithro: To be very specific, this enables Windows builds using *some* variants of msys. There are really too many versions of msys and git to keep track of for a "one-size fits all solution".14:46
cr1901_modern1sys.platform returns cygwin, and cygwin should be just fine using the previously existing code.14:46
cr1901_modern1git actually works properly from a command prompt w/o bash, but it really wants POSIXy paths, and Windows Python doesn't. So I use a command to convert instead of creating a crappy version of my own :)14:47
mithrocr1901_modern1: How did you install "windows Python"? conda?14:49
cr1901_modern1mithro: msys2 package14:49
mithrocr1901_modern1: It would be good if we used conda on Windows too14:49
cr1901_modern1mithro: See the question I asked in #m-labs b/c I forgot sb0 also frequents this room lol14:51
cr1901_modern1mithro: It should be doable. The complication is that some minimal subset of POSIX tools need to be provided so neither MiSoC/LiteX nor the HDMI2USB build bomb, and path-handling is one place where "patching a Windows build" could be different depending on which project you obtained your POSIXy tools from14:53
cr1901_modern1Basically, I took the "works on my machine" approach for now :P, b/c MSYS2 is one of the more common ways to get your daily recommended dose of POSIX tools14:54
mithrocr1901_modern1: Okay15:10
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cr1901_modernmithro: Do me a favor when you're awake, and build mimasv2_base_lm32, and then read me timing errors in top.par21:24
mithrocr1901_modern: ?21:25
cr1901_modernOr if anyone else is awake/running on Linux, could they checkout nextgen of HDMI2USB-litex-firmware and do the same?21:25
cr1901_modernmithro: There's a timing violation in the PAR step21:26
mithrocr1901_modern: I don't remember seeing any...21:27
cr1901_modernIt's not caught on my machine b/c I never made a pull request to fix this bug in LiteX ( _florent_: patch incoming in a bit). But on a Linux machine, the script should've terminated21:28
cr1901_modernSo if your script ran to completion, then there was no violation21:29
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cr1901_modern1Jesus f***ing christ, took me 4.5 minutes to reconnect21:37
mithrohrm, looks like there is one21:37
mithrocr1901_modern1: it definitely didn't terminate for me....21:37
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mithroWARNING:Par:468 - Your design did not meet timing.  The following are some suggestions to assist you to meet timing in your design.21:38
cr1901_modernmithro: I don't know if lowering the system clock will fix it. But I think it's a good start21:38
cr1901_modernmithro: Could you run par by itself and check the return code?21:39
mithroProbably can't do 83MHz with a grade -2 part21:39
cr1901_modernSince all the files are there already, running par again should be idempotent. I just want to check if it errors out21:40
mithrocr1901_modern: I'm pretty sure its not idempotent21:41
cr1901_modernahhh, well this is important bug to fix :P21:41
cr1901_modernthe bash script has "set -e" at the top. That should've stopped processing if one of the commands errors out21:42
cr1901_modernThis is telling me that the design DIDN'T meet timing, and yet the script kept running anyway21:42
mithrocr1901_modern: pushed a change to drop the CPU frequency, meets timing with that21:45
cr1901_modernmithro: Will check after dinner21:47
cr1901_modernI'm sure Xilinx ISE can do this, but haven't figured it out; I want to know which path is failing21:48
mithrocr1901_modern: btw - I noticed this21:56
mithrocr1901_modern: WARNING:Par:288 - The signal spiflash_miso_IBUF has no load.  PAR will not attempt to route this signal.21:56
mithrocr1901_modern: It was the sys_clk route which was failing21:57
mithrocr1901_modern: See the table21:57
tpbTitle: Snippet | IRCCloud (at
cr1901_modernThat's interesting... I wonder if that same warning's in the scope version22:00
cr1901_modernahhh, looks like 399 regs had setup violations. I mean, that's fixable.22:02
cr1901_modernWe could prob delay crg_unbuf_sys by some fraction of a cycle to satisfy setup times22:03
cr1901_modernif 83MHz operation is important22:03
mithrocr1901_modern: It's not really, we use a 50MHz lm32 on the Opsis22:04
mithrocr1901_modern: the par tool is returning 022:04
cr1901_modernGreat :D! (re: the par)22:08
cr1901_modernAnd really? 50MHz? I thought LX45 would give plenty of space so 100MHz was doable22:08
cr1901_modernnot that it matters22:09
mithrocr1901_modern: It's a problem with the 1:4 sdram22:16
cr1901_modernI'm guessing _florent_ came up with the timing for the mimasv2?22:19
cr1901_modernmithro: With your new change, the DDR RAM's being run at 200MHz instead of 333MHz. Is that a problem?22:19
* cr1901_modern will find out soon enough...22:20
mithrocr1901_modern: hrm - true I guess...22:25
cr1901_modernmithro: In any case, slowing it down didn't fix the output. So I'll need to take a look at that "will not be PAR'ed" input22:30
cr1901_modernIt doesn't make sense that the scope target works when the CPU doesn't...22:30
mithrocr1901_modern: if you have another uart, attach it to the pins and have both the bridge and cpu going at once?22:35
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mithrocr1901_modern: is XIL_TIMING_ALLOW_IMPOSSIBLE set?22:40
cr1901_modern1mithro: Not sure22:41
cr1901_modern1mithro: No. I've never set that env variable22:42
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mithroWell, I'm heading to bed I think23:15
cr1901_modern1mithro: Night. I'll keep working on it23:35

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