Tuesday, 2016-08-02

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xfxfthaytan: at LCA you established the dv/hdv gstreamer sources had old timing code or something, which was why they were getting out of sync.  is this resolved, or still there?03:56
xfxf(i'm assuming nobody cares about dv/hdv anymore :)03:59
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thaytanxfxf, nothing has changed, but I'm not sure about the diagnosis04:04
thaytanI think if you set the network clock on the capture pipeline, things should stay in sync04:05
thaytanraw1394src will use that clock to apply timestamps onto the received packets04:05
xfxfokay, cool - i might give that another go if you think it should work04:06
xfxfmy interpretation of the comments were that dv/hdv were probably best not to use but if you believe they'll remain in sync with a network clock, i'll try again04:06
thaytanxfxf, bilboed did a lot of work with HDV a while back, so we could ask him about it04:08
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xfxfthaytan: okay, how do i do that, ping him on IRC?05:13
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ssk1328mithro: Did you see the link to block diagram, I had sent here yesterday?06:14
mithrossk1328: Yes I did, but it wasn't clear to me how to read it06:14
ssk1328mithro: That is how the blocks are connected in HDMIOut __init__.py file06:15
mithrossk1328: Sure, but that doesn't really tell you all that much?06:15
ssk1328mithro: I need to understand how DMA is connected, if I am trying to figure out how to add another DMA port06:16
mithrossk1328: Yes, you do06:16
mithrossk1328: So - what you want to figure out is the signals between each of the blocks and what they are doing06:17
ssk1328mithro: Yes06:17
mithrossk1328: I don't find that diagram all that helpful in that bit06:18
ssk1328mithro: Okay, I did add something for FrameInitiator, but now thats what I need to know06:19
mithrossk1328: If the system worked the way I would expect - there is something which generates an memory address on every pixel clock which somehow gets to the dram system06:19
ssk1328mithro: I guess the FrameInititor block does that, send the address signal to dma_lasmi.Reader()06:21
mithrossk1328: Possibly06:22
mithrossk1328: I think the VTG handles generating the "pixel position" - IE the current x/y position of the pixel06:22
mithrossk1328: However, I don't think it works in terms of x/y position06:22
ssk1328mithro: So if I am to read data from two, DMA ports, layouts at each interface have to be changed06:24
mithrossk1328: So, you are going to have to generate two memory addresses which correspond to the same pixel in two different buffers06:26
ssk1328mithro: Yes, via the FrameInititator block I guess06:27
ssk1328mithro: The intseq block takes lasmi.aw as input06:28
mithroaw is?06:28
ssk1328adress width06:28
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mithrossk1328: Is that how big a region of memory it needs to address?06:31
ssk1328mithro: Yeah, basically if we are the memory address will have this many bits06:33
ssk1328mithro: Basically any memory adress will have this many bits06:33
mithrossk1328: the #m-labs guys can probably explain lasmi a bit better - sb0 is the primary creator of that if I understand correctly.06:33
ssk1328mithro: Okay06:34
ssk1328mithro: I guess I need to completely understand the FrameInitiator and VTG blocks too06:35
mithrossk1328: yeah definately06:35
mithrossk1328: I seem to remeber some lasmi documentation floating around?06:36
mithroAhh ha!06:37
tpbTitle: Case studies Migen X documentation (at migen.readthedocs.io)06:37
mithroThe purpose of the VGA framebuffer core is to scan a buffer in system memory and generate an appropriately timed video signal in order to display the picture from said buffer on a regular VGA monitor.06:37
ssk1328mithro: The rest of the stuff (VTG and FrameInititator) was developed by? _florent_ I suppose?06:37
mithroactually, I think it was probably sb0 too06:37
ssk1328mithro: I guess the block diagram I made is very similar06:38
ssk1328mithro: But this is gold!06:38
mithrossk1328: Did you Google any of these terms at all?06:38
mithrossk1328: I found that by Googling "lasmi memory"06:38
ssk1328VTG i knew was video timing generator, but I was seeing some Xilinx IPs06:39
ssk1328When I googled06:39
mithrossk1328: for misoc/litex stuff it is good idea to add things like "m-labs" "enjoy-digital" "Sebastien" and "Florent" to the search can help06:40
ssk1328mithro: Next time definitely!06:40
mithrossk1328: Sorry I didn't recall that this existed before07:05
mithrohey rohitksingh_work07:07
rohitksingh_workmithro: hi!07:07
mithrorohitksingh_work: I send the display port aux interceptor off to be made07:07
mithrorohitksingh_work: I'll send you one when I get them back - but it won't be for at least 3ish weeks before that happens07:08
rohitksingh_workmithro: wow! it will be fantastic to have it...I can peek at the AUX channel finally07:09
rohitksingh_workfrom hackvana again I guess?07:09
mithrorohitksingh_work: yes07:13
rohitksingh_workmithro / _florent_  / cr1901_modern : can anyone give me brief intro to new simulation flow in migen. Last I heard, it had changed from icarus to verilator. Docs seem to be in-progress https://github.com/m-labs/migen/blob/master/doc/simulation.rst07:14
tpbTitle: migen/simulation.rst at master · m-labs/migen · GitHub (at github.com)07:14
mithrorohitksingh_work: misoc only does in python testing I think?07:17
mithrorohitksingh_work: One of the reasons litex exists is to keep the non-Python simulation stuff I think....07:18
mithrorohitksingh_work: The verilator is more for doing whole system simulation - IE running the whole soc07:21
sb0I wrote the framebuffer cores, yes07:21
sb0but maybe Florent modified those you are using, I don't know07:22
mithrosb0: I think he mainly modified the pixel output bit to enable non-RGB pixels07:26
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rohitksingh_workmithro: I've never tried simulating misoc/whole-soc...only individual modules with migen & icarus08:12
mithrorohitksingh_work: It's more useful for doing things like software development I think08:13
rohitksingh_workmithro: oh okay. I think _florent_ might provide some info on that08:16
mithro_florent_ is on holidays for the next 2 weeks I blieve08:17
ssk1328mithro: What should be the correct way to proceed here, I am thinking of something like this https://docs.google.com/document/d/1g1c2IwCVxVzSHWdXbZ746HP-fnM4y1WqFuBZNkLi5mw/edit#, add support for handling two pixel streams in VTG and Driver modules. This needs some changes to be done in VTG and Driver modules for handling double the data.08:35
tpbTitle: Mixer Block Design - Google Docs (at docs.google.com)08:35
ssk1328mithro: Or the other option being except for FrameInitiator module (which sits at the top), define two of everything else and connect accordingly, which might be easy but not sure this is how it is meant to be done08:37
mithrossk1328: I think the VTG should be agnostic towards the pixel data it is transmitting09:38
mithrossk1328: well, there should only be one VTG09:38
mithrossk1328: It's important that both data coming in is synchronised09:39
ssk1328mithro: agnostic as in VTG doesn't know what the data is, it just transmits09:40
mithrossk1328: yeah?09:40
ssk1328mithro: Okay, I guess some layout changes in VTG and Driver will be needed09:41
mithrossk1328: see the diagram I updated10:01
mithrossk1328: So it might be good to look at the VTG in misoc to see a simpler version, looking at the code I think florent changed it to deal with the fact that we can have multiple pixels in each memory word?10:09
ssk1328mithro: Okay10:10
ssk1328mithro: There are two Driver in this HDMIOut, that means instead of defining two instances of HDMIOut, we will have just this one instance10:11
mithrossk1328: ?10:12
ssk1328mithro: So why do we have two driver module then, the mixer is already mixing them right?10:13
mithroI guess the driver doesn't really make sense - they should be "HDMI Output" modules really....10:14
ssk1328mithro: So basically earlier we used to define two instance of HDMIOut (defined in gateware/hdmi_out/__init__.py) in opsis_video.py, as both the HDMI out were independent, but now this one module will control both the hdmi_out ports10:19
mithrossk1328: No you have the mixer have two outputs, which at a higher level you connect to the HDMI Outs10:51
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j-sohi folks - qq about HDMI2USB - has anyone used it for doing overlays?17:25
j-sospecifically, HDMI2 video + alpha channel overlayed on top of HDMI2 video?17:26
CarlFKj-so: curious what you mean.17:31
j-sobasically, I have two incoming HDMI video streams17:38
j-soHDMI1 is just regular video - say from a set-top box17:38
j-soHDMI2 is an overlay - a dashboard I'd like superimposed on HDMI117:38
j-soand the combined signal to come out through a HDMI out17:39
CarlFKah... kinda. I am guessing the MilkyMyst thing would do that.17:40
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j-sohmm. that kinda feels like overkill. has anyone managed to run Milkymist SoC on the Opsis?17:47
CarlFKi don't think so.  I think it was deamed "this should work"17:50
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j-sookay thanks, would love to hear if folks have made it work18:03
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tpbTitle: HDMI CEC Framework Finally Queued For Linux 4.8 - Phoronix (at www.phoronix.com)22:59
mithroCarlFK: is j-so comes back, ssk1328's work will allow for what j-so was asking for. It's effectively real time chroma-keying.23:01
mithroshenki: Things like that CEC support are the reason I think we want the hdmi2usb firmware to be Linux based in the future.23:03
mithroBe back later23:04
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cr1901_modernmithro: Are you going to run Linux with an MMU or not?23:20
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