Wednesday, 2016-03-23

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CarlFKmithro: Can you check the jumpers on the board and make sure that the Cypress Reset line is properly connected?02:28
CarlFKwhere are jumpers defined ?02:28
tpbTitle: HDMI2USB-numato-opsis-hardware/Numato-Opsis-v3-prod-3-g83e7bd5.pdf at master · timvideos/HDMI2USB-numato-opsis-hardware · GitHub (at
mithroCarlFK: We need to get some pictures and stuff of each of the jumpers02:33
mithroCarlFK: but I haven't had time too02:33
CarlFKmithro: I see cypress-reset on that PDF, but I don't see how that relates to physical location on the board02:38
mithroIt'll have the same labels02:38
CarlFKmithro: conn_3 K3?02:41
mithroIt'll be near the Cypress FX2 chip somewhere02:41
CarlFKalso, is there something I can hook the case's power switch and led to? (mainly so the wires aren't flopping around, and half the time making it hard to close the case02:41
mithroCarlFK: yes, there is a connector labeled something like PC Reset02:42
CarlFKis the Cypress FX2 chip the other big chip besides the FPGA ?02:44
mithroIt's the one near the large USB connector02:44
CarlFKthe labels are very hard to read02:44
CarlFKmithro: is the reset jumper one of these?
tpbTitle: Google+ (at
mithroCarlFK: no, I think it's the one in the corner that is closer to the USB connector?02:55
tpbTitle: Google+ (at
CarlFKusing my phone camera, hard to get the focus and lighting good02:55
mithroThat photo is too fuzzy for me to tell02:57
mithroIs it labelled K3?02:57
CarlFKyeah, I think that says K3 and fx2-reset02:58
CarlFKjumper is between pin 2 and 302:58
mithroCarlFK: okay, that looks correct02:59
mithroCarlFK: for the next bit, you are going to need a multi-meter or oscilloscope03:00
mithroCarlFK: basically you want to watch what happens to the voltage on Pin 3 when the FX reset output is occuring03:00
CarlFKmithro: sorry, no scope and I can't find a meter ... I have the case led, would that work?03:08
mithroYou did see the script I linked which doesn't need this part to work?03:10
CarlFKit errored with "not implemented" ... I think... have it handy Ill try again03:12
mithroCarlFK: are you using the opsis-prod branch from my repo, like I linked?03:13
CarlFKI can't say for sure  - right now I am trying to use the serial port and failing03:15
CarlFKhappy to do something else and report results03:15
CarlFKis there a cad file for the board  so I have a better hope at reading labels?03:16
mithroCarlFK: Those label seems to be pretty readable via the clear photo....03:22
mithroCarlFK: you can look at the gerber files, but they need a special reader03:22
CarlFKmithro: I wanted to find  PC Reset and anything else I may need to find03:24
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mithroCarlFK: the PC reset is near PCI-Express connector03:24
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mithrosab_123: You had some questions yesterday?03:28
mithroOh, that was ssk1328_03:29
sab_123mithro : :-)03:29
sab_123I am looking at adding XIlinx Platform cable support03:30
CarlFKmithro: FPGA & Memory Layout ...highlighted in Pink - I see "pwr+rst"  next to a 9 pin header03:30
mithroCarlFK: yeah - that is the one03:30
mithroI believe _florent_ was going to make that work03:30
CarlFKmithro: have a guss what should I hook the button and led to?03:31
CarlFKmithro: guessing rst is 7-9 ?03:31
CarlFKer, no.. I can't count03:32
mithroCarlFK: check the schematic?03:35
CarlFKmithro: I am looking at the pdf: 5 goes to R116/100R to ground, 7 to RST - Does that sound like a good place for the switch?03:49
mithroPressing the reset switch will effectively "short" the two pins together, hence it will pull the reset line to ground  if your description is correct (effectively making it a zero). I think this is what we want03:50
mithroCarlFK: that bank should be laid out like found on a PC motherboard03:52
CarlFKmithro: shorting random pins probably wont damage anything, right?03:52
mithroCarlFK: that is what the 100R resistor is there to prevent03:53
CarlFKmithro: any idea what the different LEDs show?03:54
mithroWhat do you mean?03:56
mithroI'm pretty sure they aren't connected to anything at the moment03:56
CarlFKon that header is LED1 LED23 and INFO - given I have 1 led, I was wondering what the choices are03:57
mithroCarlFK: I'm sure at the moment they are all equally not in use04:00
mithroCarlFK: please update the docs with the above information04:08
CarlFKmithro: there are 2 leds on the board: red seems to be power, it is always on when powered.  blue is labeled "done"04:23
CarlFKI am guessing blue goes out when it is done booting?04:24
mithroCarlFK: That sounds about right04:24
CarlFKmithro: ok, so when I power it up, blue is on for 5 sec.  it goes out.  I hit the switch, blue comes on, 5 sec, goes off...04:25
CarlFKif I hit the button ~a while~ (60 seconds?) later, no blue or anything04:26
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CarlFKrohitksingh: I have your vga board plugged into my Atlys... and want to try it soon.  like in 8 hours because it is about bed time04:53
mithroCarlFK: as I said, I don't think the button does anything04:54
mithrooh wait04:54
mithroCarlFK: the button *is* doing something?04:54
CarlFKmithro: yes04:54
mithroCarlFK: Interesting04:54
CarlFKbut only if I press it before X seconds.. and I am not sure what X is.  might be 10 seconds04:55
mithroCarlFK: Time for you to learn to read schematics :P04:55
rohitksinghCarlFK: Hi! :) try these instructions
rohitksinghcurrently works at [email protected] only04:57
rohitksinghand encoder has not been added04:57
rohitksinghI'll add the encoder today, since I've holiday today! :)04:58
mithroCarlFK: I don't have a production Opsis board at the moment05:01
ssk1328mithro: Hi05:09
ssk1328I am working on the proposal right now. Do you think hardware mixer block plus test cases for board working be enough for GSoC.05:10
ssk1328As complete implementation of Hardware fader block will be the focus.
tpbTitle: [HDMI2USB] Add "hardware mixing" support to HDMI2USB firmware · Issue #34 · timvideos/getting-started · GitHub (at
ssk1328And apart from this, write several test cases to test the functionality of Opsis board.
tpbTitle: Embed a wide range of test patterns · Issue #185 · timvideos/HDMI2USB-misoc-firmware · GitHub (at
mithrossk1328: It depends on your skill level :) - A really skilled student would finish that in a couple of weeks (IE someone who was better then myself :)05:14
mithrossk1328: I think for the average "good student" - Getting the hardware mixing which does all the things like wipes and fades would probably be a good 2-3 months work05:15
mithrossk1328: Have you started writing your GSoC proposal yet?05:15
ssk1328I was finishing some sections.05:16
mithrossk1328: Are you using Google Docs?05:17
ssk1328Okay, so I will try to be an above average "good student" and try to attempt testing part as well if time remains.05:17
ssk1328Should I share it in the uncompleted form.05:17
ssk1328Yeah I am using Google Docs05:17
mithrossk1328: Yes, please do share the uncompleted doc05:18
mithrossk1328: We'll then make sure you are heading in the right direction and not spending too much time on things which aren't important05:18
mithrossk1328: When I say the above, I do mean that the stuff should be tested.05:18
mithroDoing some static patterns in #185 should be a day or two of work05:19
mithroDoing the dynamic patterns in #185 should be a couple of days work once the hardware mixing is working05:19
ssk1328Yeah, the mixer block will definitely be tested.05:19
ssk1328Here is a link to my proposal
tpbTitle: [GSoC16] Project Proposal: Add "Hardware Mixing Support" - Google Docs (at
CarlFKmithro: "Software flow control wouldn't fix the problem you are encountering either, as cat wouldn't use it."05:24
CarlFKmithro: I think this will ...05:24
CarlFK  ixon  "Output from the system is stopped when the system receives STOP and started when the system receives START. "05:24
tpbTitle: Manpage for stty - manual pages (at
mithroCarlFK: Arn't you just doing "cat FILE > /dev/ttyACM0" or something like that?05:25
CarlFKmithro: well, at the moment I am not doing anything because nothing works05:25
CarlFKmithro: but I think stty lets me set things so that then cat FILE > /dev/ttyACM0" should work .. assuming the Opsis sends start/stop chars05:26
mithroCarlFK: Does deeprave's stuff work?05:29
CarlFKmithro: no idea.  I got the feeling it was "almost done" and then never finished05:29
CarlFKmithro: or another idea - can we slow down the baud rate so that the Opsis side has time to move the char out of the buffer before the next one comes in?05:29
mithroCarlFK: If I understand what is happening correctly, the problem is in the FX205:30
CarlFKmithro: that doesn't mean anything to me.05:31
mithroCarlFK: I'm pretty sure  fixing that will reduce the problem significantly05:32
mithroCarlFK: The FX2 is the USB<->FPGA interface, like I've mentioned literally a bazillion times05:32
CarlFKmithro: what file(s) should someone look at to fix it?05:33
mithroCarlFK: did you look at the branch I linked at all?05:34
CarlFKmithro: I  look at everything you suggest05:35
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tpbTitle: Comparing timvideos:master...mithro:fx2-refactor · timvideos/HDMI2USB-misoc-firmware · GitHub (at
CarlFKmithro: um.. "     Showing          with     2,404 additions     and 844 deletions"05:40
CarlFKmithro: not sure why I am looking at that05:40
sab_123mithro : sent an email05:40
mithroCarlFK: because that shows you the start of the stuff needed to fix this problem05:42
CarlFKmithro: that looks like way more05:54
mithroCarlFK: it's not a simple thing to "just fix"05:54
CarlFKmithro: if that isn't simple, shouldn't we try dropping the baud and seeing if that works around it?06:00
mithroCarlFK: That will just make the problem worse06:00
CarlFKI am going bonkers trying to work around it on the (what side are my scripts on, the host side?)06:00
mithroCarlFK: The problem is that the host just shovels the characters down the USB faster than the FX2 can shovel them over to the FPGA06:01
mithroCarlFK: when setting the baud rate, all the computer does is send a USB command which is "set your baud rate to XXXX"06:02
mithroCarlFK: it doesn't effect how fast it shovels data down the USB06:02
CarlFKoh.. I think i see ...06:03
mithroCarlFK: This is caused by the FX2 firmware not fully implementing the USB serial standard properly and exacerbated by the FX2 output code being really crappy (working at like 5% efficiency)06:04
CarlFKmithro: ok, I'll go back to throttling the cat command.  I think I am close.  I gave up when it seemed to be eating my \n chars.  or sending them as 2 chars: \ and n.06:08
mithroCarlFK: I'm pretty sure that deeprave had a very simple python script which would trickle a file down the serial port06:09
CarlFKnone of what I saw looked simple06:09
mithroCarlFK: The hdmi2usb daemon was after that06:09
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tpbTitle: GitHub - mithro/fx2-ftdi-emulation: Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support). (at
sab_123There doesnt seem to be any issues07:32
sab_123Is there any other repo07:32
tpbTitle: Create example firmware which emulates the FTDI usb-serial devices · Issue #4 · mithro/fx2lib · GitHub (at
mithrosab_123: That code doesn't actually work yet07:33
sab_123I didnt know that07:33
mithrosab_123: you should assume nothing works until you have confirmed that it works07:34
sab_123mithro: ok07:35
sab_123mithro: when you say ftdi emulation07:40
sab_123We still use SLave FIFO to transfer data into FX207:40
sab_123Then write custom logic to map pins to rxd to txd07:40
sab_123So we need some form of flow control07:40
sab_123How do you plan to achieve this?07:41
sab_123Or shall we just assume device can read data at 11520007:41
sab_123and no flow control is needed07:41
tpbTitle: fx2-ftdi-emulation/ at master · mithro/fx2-ftdi-emulation · GitHub (at
sab_123I am looking right now at it07:42
sab_123Do we need the optional07:42
sab_123or Rxd/txd is enough07:42
mithroAll those modes should work07:42
mithroThe optional signals all need to be bit banged.07:42
sab_123i was thinking07:43
sab_123something like a high speed UART07:43
sab_123So you have SLAVE FIFO to send in data07:43
sab_123and send it out07:43
sab_123but really really high spee07:43
sab_123or do you want to bit bang UART07:43
sab_123Slave FIFO is well tested07:43
mithrosab_123: that is the "FIFO Modes"07:43
sab_123Well I am talking about mapping FIFO to UART07:44
sab_123FIFO is high speed07:44
sab_1238 or 16 lines07:44
sab_123but UART is alower07:44
mithrosab_123: everything on that page should work07:44
sab_123So I wanted to know if you wanted something like a FIFO UART bridge07:44
sab_123or Just UART07:44
sab_123and just FIFO07:44
mithrosab_123: I want *everything*07:45
sab_123but these are well tested stuff07:45
sab_123what do you want me to do?07:45
sab_123Maybe bitbang UART07:45
sab_123But I2c, JTAG etc are already there in fx2lib07:45
mithrosab_123: What don't you understand about the *everything* bit ?07:45
mithrosab_123: the firmware should emulate all functionality of the ftdi chip07:46
sab_123in 1 firmware07:46
sab_123or can reaload07:46
mithrosab_123: Including UART modes, FIFO UART bridge modes, MSSPE modes07:46
sab_123same hex file?07:46
mithrosab_123: If possible07:46
sab_123mithro: my question is amny of these modes already exist07:47
sab_123I can combine it07:47
sab_123and check for conflicts07:47
mithrosab_123: no, none of that functionality exists yet - some bits are started07:47
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sab_123well slave fifo is an appnote07:48
sab_123but in keil07:48
mithrosab_123: yes, but emulating the slave fifo mode of the FTDI chip is not as simple as just using that appnote07:48
mithrosab_123: you understand what an FTDI chip is, right?07:49
sab_123This chip is what youw ant to emulate ?07:50
sab_123there are many versions07:51
sab_123I assume you want H07:51
sab_123you use FTDI drivers07:52
sab_123which many people really dont like after the stunt they pulled07:52
sab_123* I mean you want me to use FTDI drivers and make it compatible correct07:52
mithrosab_123: Yes, it should work with the FTDI drivers, libftdi, linux kernel drivers, etc07:56
sab_123mithro: I think then that this is big enough for a GSOC project07:57
sab_123what do you think07:57
sab_123emulating a whole IC like FT2232 and getting it working is going to take quite some time07:57
sab_123can i talk only about this for hte proposal?07:59
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mithrosab_123: I don't think emulating the FT2232 will take a full 3 months of full time work09:15
sab_123mithro : :-)09:15
sab_123I knew you will say that09:15
mithrosab_123: I recon that there is probably 2-3 weeks worth of full time work for myself - which is probably 1/1.5 months of work for someone unfamiliar with it09:16
sab_123i dont want to commit to too much09:16
sab_123thats the only thing i am afraid of09:16
mithrosab_123: Start planning out what you want to do09:19
mithrosab_123: that will help you assess if the timeline is accurate09:19
mithrosab_123: Maybe there is something I'm missing09:20
mithrosab_123: maybe you have missed some important work which has already been done09:20
mithrosab_123: you won't know until you have more details fleshed out09:20
sab_123do you actually type sab_123 on each line09:21
sab_123There must be some elegant way of doing this09:21
mithrosab_123: we also expect that what you end up doing will only vaguely look like what you initially proposed - that is the curse of software development :)09:21
mithroI type s then hit tab and my client completes it09:21
sab_123IRC Cloud09:22
sab_123this does it too09:22
mithroIt's a pretty common thing in most IRC clients09:22
mithroanyway, have to run now09:22
sab_123take care09:23
mithrosab_123: start a Google doc, put the stuff here into it, start fleshing out the ideas and breaking them down into periods of a couple of days09:23
mithrowith milestones and such09:23
sab_123will do it today night09:23
mithrosab_123: share the document as soon as you have started to put some type of timeline together09:23
sab_123i am just looking at apertus group09:24
sab_123seeing if I can get an internship09:24
sab_123because that stuff seems to be much closer to my work09:24
sab_123i just wanted to be honest and let you know09:25
sab_123hope you are fine with that09:25
mithrosab_123: but if you missed a GSoC deadline, there is nothing we can do for you - that is out of our hands09:26
mithroSo do keep that in mind09:28
sab_123mithro; whatever you do10:09
sab_123mithro, you will need to use slave fifo right10:09
sab_123only what you do with the data will be different10:09
mithroJTAG and I2C are normally done with the MSPE engine10:10
sab_123for FX210:10
mithrosab_123: it also depends on the pins you want to use on the FX210:10
sab_123howw do you plan to get data in10:10
sab_123only USB si there10:10
sab_123so i am thinking10:11
sab_123build a good slave fifo module to use as data capture10:11
sab_123then build erverything around it10:11
mithroI still don't think you understand this project10:11
sab_123mithro, what do you say that10:11
sab_123So you want all the functionality that FT2232H on FX210:14
sab_123by modifying firmware of FX210:14
sab_123So for example for UART10:14
sab_123you want FX2 to appear as a COM device10:15
sab_123so you use putty and write to it10:15
mithrosab_123: let's think about this in a different way10:15
mithrosab_123: There are two "sides" to this problem10:15
mithrosab_123: One side is the USB protocol - here we want to emulate a FTDI chip10:15
mithrosab_123: but there are actually multiple protocols the FTDI chip implements10:16
mithrosab_123: on the FX2 side there are multiple ways to connect the FX2 chip to something else10:17
mithrousing the hardware uart, bitbanging, the FX2 FIFO interface, etc10:17
mithrohave to run, will continue this conversation later10:17
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CarlFKrohitksingh: are you here for an hour or so?13:51
CarlFKif so I'll hook up my Atlys and try your vga code13:52
rohitksinghCarlFK: Hi! Yeah!13:59
CarlFKyay!  brb13:59
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CarlFKok, plugged in...14:36
CarlFK[email protected]:~/Downloads$ md5sum atlys_base-basesoc-atlys.bit14:37
CarlFKe6819fc63c8a2e3a8bb1962d3ee3c1be  atlys_base-basesoc-atlys.bit14:37
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CarlFKloaded file atlys_base-basesoc-atlys.bit to pld device 0 in 13s 910206us15:05
CarlFKgetting there slowly... keep getting distracted15:05
rohitksinghCarlFK: awesome15:19
rohitksinghnow give the board VGA input at [email protected]15:19
CarlFKVGA1 connected primary 1024x768+0+0 (normal left inverted right x axis y axis) 0mm x 0mm15:37
CarlFKHDMI2USB> status15:38
CarlFK[AD9984A] Register : 0x01, Value : 0x5415:38
CarlFK[AD9984A] Register : 0x02, Value : 0x0015:38
CarlFK[AD9984A] No. of hsync per vsync: 80615:38
CarlFKrohitksingh: why is there a counter on the test pattern?15:40
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rohitksinghCarlFK: just to make sure the lm32 core is active and running properly I guess...15:48
CarlFKrohitksingh: but I have never seen it before15:48
rohitksinghCarlFK: the values look good... try "vga_switch on" command15:48
rohitksinghand check if vga if getting captured properly or not15:49
CarlFKSwitching on VGA output on HDMI_OUT0...15:49
CarlFKlooking good15:50
CarlFKwell, looks like 1024x768 stretched to a 16:9 display15:50
rohitksinghCarlFK: vga capture is working? there might be gamma, gain and saturation problem, will have to correct those in registers15:51
CarlFKit is working15:51
rohitksinghohh thats probably due to your monitor i guess15:51
rohitksinghCarlFK: awesome! you are the first one to get it working apart from me, if I recall correctly! :)15:52
CarlFKI am trying to figure out how to display some test patterns15:53
rohitksinghyou want to program your own test patterns? the code is in pattern.c file! you can just create your own ones!15:55
CarlFKrohitksingh: what are the chances of changing or adding 1280x720?15:55
CarlFKno, I want the vga source to send a test pattern to your board15:56
rohitksinghits actually not that tough. Its on ToDo list. I'll do that tonight!15:56
CarlFKthat wold be fricken fantastic15:56
rohitksinghohh okay! no idea on softwares which generate test patterns :/15:57
CarlFKmeh, just need to display an image where I have some idea what the colors should look like16:00
CarlFKso far the little I have done looks fine16:00
CarlFKhow do I send vga to encoder ?16:04
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rohitksinghCarlFK: encoder is not added yet! Will add that too! this was just a Proof of Capture16:32
rohitksinghafter correct capture to DDR memory, we can use rest of the infrastructure (like encoders etc) as is16:33
CarlFKah... ok.16:37
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CarlFKmithro: I am at PS1 with multi meters and scopes.  and Opsis board.23:21
CarlFKmithro: do you have any time to help me with the fx2_reboot jumper thingy?23:23
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