Wednesday, 2016-01-27

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CarlFKxfxf: new problem - if we use firewire, how do we get audio?00:07
xfxfCarlFK: the same way, ALSA?00:08
CarlFKI just showed deeprave my ... alsa mux client stuff, he is going to try to add that to your fw script00:08
xfxfit won't be hard to change00:08
xfxfthere's two ways to do it00:16
xfxfactually i'm pretty sure i can make what needs to happen00:17
xfxfi'll do it now and commit up00:17
xfxfi obv can't test tho00:17
deepravei can though00:28
tpbTitle: video-scripts/ryan/lca/other/firewire-capture at master · xfxf/video-scripts · GitHub (at
xfxfhaven't tested them but they should be a start00:28
xfxfalso in tim's directly he had a version of the alsa only script that tee'd off the audio and pushed it into a video generator which showed a waveform00:29
xfxfit's probably a good idea if not too computationally expensive00:29
xfxf(obviously watch CPU with all of this too, should never exceed 80% - DV on the i5's for me was eating up a lot, i couldn't run voctocore/voctomix/DV on the same i5...)00:29
xfxfif the scripts don't make sense, ask Tim to show you what he showed me a few nights ago, that plus playing with a few pipelines and i now kinda grok how it all works00:31
CarlFKxfxf: why?00:37
xfxfwhy wht00:37
CarlFKwhy write  video generator which showed a waveform00:38
xfxfit's not required, but it's just a nice to have tim added00:38
xfxfi believe the logic is to show the source has audio visually00:39
xfxfbut the VU meter also achieves that00:39
CarlFKI don't see that being used.00:39
xfxfif doing this seperate ALSA thing i'd suggest putting the ALSA source first anyway, like we did with dvswitch, so it's the default one chosen00:39
xfxfa step of 'select the audio source' is another thing volunteers will forget00:39
xfxfCarlFK: you'll observe i didn't add it to my script, i dunno why you're arguing that with me :)00:40
CarlFKthat would be 3 streams over cat5.00:40
xfxfnot at all00:40
xfxfyou run that on the voctocore/mix machine...00:40
CarlFKwell, ok.  still not sure why00:40
xfxfi'm happy if it's muxed in with the DV source, all i'm giving you guys are options for testing00:40
CarlFK"if the scripts don't make sense, ask Tim..."  <- that is direction to do something.  not "if you are bored and run out of things to do.. bother tim so he stops doing what he is doing."00:42
CarlFKso stop that00:42
xfxfwhy are you being argumentative, i'm not doing anything that opposes you00:43
xfxfif you don't want my scripts, shrug, fine - i'm attempting to help.  please be positive00:44
CarlFKyes you are00:44
CarlFKtumbleweed says 682Mbs is coming into the core from 2 clients00:54
mithroxfxf: what is your work address?01:41
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mithro_florent_: ping me when you get up / ready to work06:05
tumbleweedCarlFK: /etc/openntpd/ntpd.conf07:12
tumbleweedCarlFK: content: server $NAME (repeat times n)07:12
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micolousthese have isc dhcp07:26
micolouserr ntp07:26
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cr1901_modern_florent_: Ping?08:00
cr1901_modern_florent_: I could use a second pair of eyes on this. This is the core to a frequency counter w/ FIFO storage. Before I try hooking it up to the CSR bus, do you see anything egregious?
tpbTitle: Migen Frequency Counter · GitHub (at
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_florent_mithro/cr1901_modern: pong10:14
mithromorning _florent_10:14
_florent_evening :)10:15
_florent_ok, so what are the news?10:15
mithro_florent_: I fixed the ROM problem10:17
mithro_florent_: and the version info problem10:17
mithro_florent_: It appears that the HV30 you have is in NTSC mode, while everything here is in PAL mode10:18
mithro_florent_: I switched my HV30 (also tested HV20) to NTSC mode and then got this ->10:18
_florent_are you testing with both Opsis and Atlys? or just Opsis?10:19
mithro_florent_: mainly Opsis, just about to try with an Atlys board10:20
_florent_because I don't understand why there are some differences between Opsis and Atlys boards with some camera10:20
cr1901_modern_florent_: Hi. I'm here. Just wanted a second pair of eyes on my freq counter. Although it seems the problem is solved :O?10:25
_florent_cr1901_modern: yes I'm looking at the code10:26
_florent_why are you using a fifo?10:26
_florent_here is something I use on another design:10:27
tpbTitle: [Python] class FrequencyMeasurement(Module, AutoCSR): def __init__(self, pulse): - (at
mithro_florent_: with the version info being incorrect, it was hard to understand what firmware versions the Atlys/Opsis are using10:27
mithro_florent_: I'm still trying to get an Atlys onto the exact same firmware we have been testing the Opsis with10:28
mithro_florent_: should have it working in the next 10-15 minutes10:28
_florent_I'm just trying to understand why we have different behaviour10:29
mithro_florent_: Yes, so am I :)10:29
_florent_so for the HV30, you are going to use it in PAL right?10:29
mithro_florent_: That is the current plan, but its open to discussion10:30
mithro_florent_: It is easy to switch back and forth between the two versions now I've figured out how10:30
cr1901_modern_florent_: The idea w/ a FIFO was to be able to take a sliding average every so often w/o needing to use the CPU to move data to main memory10:31
_florent_ok, but we have to use very little ressource for that since we already have problem getting P&R done10:32
cr1901_modernVery well, I'll get rid of it10:32
_florent_it's probably better to just have a register where the cpu can take actual frequency from time to time10:32
mithro_florent_: would it free up resources to punt the firmware rom onto the SPI flash10:32
mithro_florent_: I'd like to know if the frequency duty cycle isn't even too10:33
cr1901_modernWell, we need multiple freq counters, so we need multiple registers10:33
_florent_mithro: yes, but that would only save blockrams10:34
_florent_what do you mean by : "the frequency duty cycle isn't even too"?10:34
_florent_cr1901_modern: yes of course, one frequency counter for each measure we want to do10:35
mithro_florent_: if the positive period is longer or shorter then the negative period10:35
cr1901_modernI forget exactly how to do this, but I seem to recall that old Migen has a BankArray class for combining very similar registers into a single module on the CSR bus?10:36
_florent_you can just create registers with CSR/CSRStorage/CSRStatus10:37
cr1901_modernI'll need to make my own test signals since minispartan HDMI isn't ready yet10:39
cr1901_modernmithro: Where should I put the freq counter module? I was thinking under gateware/hdmi_in/analysis?10:39
cr1901_modernI can try to synthesize HDMI2USB on the minispartan as well, so I can test w/ real signals. Right now, all I can do is get to the MiSoC BIOS b/c I haven't figured out how to use yet10:40
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cr1901_modern_florent_: Your version of the freq counter gets the period. Is that gonna work w/ signals as fast as HDMI?10:42
cr1901_modernMy version gets the frequency (divided by a constant factor)10:42
_florent_i think it's enough to get a period, since the cpu is aware of the frequency it saves ressources letting the cpu computing the frequency10:44
_florent_but you can keep your version10:45
_florent_we'll do something simpler only if needed10:45
mithro_florent_: I'd really like to improve the debugging information we get from the firmware so we can better understand what the differences going on here are10:47
cr1901_modernI don't actually know which way is better lol. I do need to reiterate: I cannot actually test the freq counters w/ HDMI2USB. What I can do is synthesize signals from a separate FPGA of known freqs, and test via the MiSoC BIOS (which hopefully will be out of phase as well as not the same freq)10:47
mithrobblr - getting dinner10:47
cr1901_modern_florent_: One last req for advice when you have a minute?11:00
mithro_florent_: any idea why the Atlys board has a much harder time then the Opsis with routing?11:20
_florent_hmm difficult to say, higher system frequency & different DDR controller11:21
mithro_florent_: any reason to not drop the system frequency so the Atlys and Opsis are the same?11:22
_florent_we could do this now yes since the jpeg encoder is not working asynchronously11:23
_florent_I've tried reconfiguring my HV3011:23
_florent_but I don't have a mini-SD card here...11:23
_florent_and when plugged to the computer is does nothing11:24
_florent_when you are in NTSC, do you think we are running the same firmware (on the HV30)?11:24
mithro_florent_: You shouldn't need a mini-SD card11:24
_florent_hmm at least when I do what you described in the issue, it does nothing11:25
mithro_florent_: Let me check the camera here11:25
mithro_florent_: you turned the dial on the top to the "play" mode and the little switch on the side to the "card" side, right?11:25
mithro_florent_: so, what does the screen show?11:26
mithro_florent_: do you have a HV20 (silver) or HV30 (black)?11:26
_florent_the screen shows NO SDCARD11:27
_florent_and then a kind of menu with a sdcard blinking in red11:27
_florent_the I plug it to my computer and nothing...11:27
mithro_florent_: testing now, give me a moment11:28
_florent_can you try without sdcard?11:28
mithroyes, I'm getting the same here11:30
mithro_florent_: apparently you do need a SD card :(11:31
_florent_but just to understand11:31
_florent_when you are switching to NTSC11:31
seaLnein camera mode i get hdmi out when connected to a monitor11:31
_florent_you are using a custom firmware?11:31
seaLnewith no sd card11:31
_florent_hi seaLne: thanks, same for me11:32
_florent_but I wanted to update the firmware11:32
seaLneah, so that wasn't what you were wanting then? sorry11:32
mithro_florent_: so - I think the quickest thing is we debug with the NTSC mode11:34
mithroxfxf just confirmed the HV30 he sent you should have the same firmware as the one sitting in front me11:34
_florent_hmm interesting11:34
_florent_I realized that when I was doing my test, the little switch was in the tape position11:35
_florent_when setting it to sdcard it seems the hdmi output is not the same11:35
mithro_florent_: that is the correct position for using the device11:35
_florent_can you test with switch in tape position?11:35
mithro_florent_: yes11:36
mithro_florent_: can you check which mode the camera is in11:36
_florent_how can I check that?11:36
mithro_florent_:  put the camera in "camera mode" via the top switch11:37
mithro_florent_: put the slide on the side to the tape icon11:37
mithro_florent_: click the func button and use the job switch to go to the bottom item (label menu)11:37
mithro_florent_: then go down to the second icon in the full screen menu "REC/IN SETUP"11:38
mithroThe HD Standard option11:39
_florent_ok I'm there11:39
mithro_florent_: what does it say?11:40
_florent_it says what I've set :)11:40
_florent_but all are working11:40
_florent_with video_mode 1211:40
mithro_florent_: In NTSC mode, the options are HDV, HDV PF30 and HDV PF24?11:40
_florent_I have: HDV/HDV(PF30)/HDV(PF24)/DV(WIDE)/DV(NORMAL)11:41
mithro_florent_: yes, I have the same11:43
mithro_florent_: you are using your Opsis board right?11:43
mithro_florent_: I'm using an Opsis board too11:44
mithro_florent_: This is what I'm seeing ->
tpbTitle: Sign in - Google Accounts (at
mithro_florent_: This I mean ->
mithro_florent_: status is showing;11:45
mithroinput0:  720x011:45
mithro_florent_: so its continually showing 720x0, then 0x0, then occasionally 0x480 or 720x48011:50
_florent_that's strange11:51
mithro_florent_: so it seems like it is *almost* in sync11:51
_florent_here it's always working11:51
_florent_but I'm not able to test your firmware (I'm using the UART hack with the SD cards pins)11:52
mithro_florent_: whitequark suggested that we could just connect all the RX/TX pins together to get multiple UARTs working?11:52
cr1901_modern_florent_: In MiSoC, I noticed that region 7 of the CSR map is unused. Do you remember what that was used for/if free to override?11:53
_florent_spare probably11:53
mithro_florent_: As well, the memory bandwidth used seems a bit weird11:53
mithrowrite:  165Mbps11:53
mithroddr: read:  657Mbps  write:  166Mbps  all:  823Mbps11:54
_florent_yes, maybe having a shared UART can be useful11:54
_florent_this way I'll be able to test your firmware11:54
_florent_too bad we don't have a switch on the baor11:54
_florent_we could have done a simple uart mux11:54
mithro_florent_: Well, if there is nothing connected to my SD pins, it doesn't matter right?11:55
_florent_no, but we will need to set a pullup on the pin11:56
_florent_we can share the UART is we do a AND between the two pins11:57
_florent_for RX11:57
_florent_and for TX nothing to do11:57
_florent_I'm going to do that in a branch11:59
mithroI'm trying to test with an Atlys board12:05
cr1901_modernmithro: In about an hour or so, would you be willing to apply a patch from me to your own personal tree?12:08
cr1901_modernIf things go right, I should have this done by this morning.12:08
mithrocr1901_modern: sure12:09
mithro_florent_: okay, this Atlys board works with the camera12:09
_florent_I'm really wondering if that's not a hw issue on your opsis12:09
_florent_I just did that;12:10
tpbTitle: opsis: share uart pads between FX2 and SD card pins · timvideos/[email protected] · GitHub (at
_florent_with that we should be able to test the same bitstream12:10
mithro_florent_: I can test a different Opsis board - I have 10 here12:11
_florent_and with others video sources, is this opsis working fine?12:12
mithroI'm testing the exact same setup with a different opsis12:13
_florent_mithro: can you cancel build 411? :), thanks12:14
mithro_florent_: how do we adjust the IODELAY objects in the FPGA?12:15
_florent_software I think12:16
mithro_florent_: IIRC, errors in the 8B10 encoding cause the delay to be adjusted12:17
_florent_are there changes on the opsis production board and the one I have around the hdmi inputs?12:19
mithro_florent_: I have my preproduction board here too12:23
mithro_florent_: I'm connecting up my preproduction board here now12:28
mithro_florent_: okay, my preproduction board does the same thing here.....12:32
mithro_florent_: exact same firmware as the production board12:32
mithromibuild.generic_platform.ConstraintError: Resource not found: serial:None12:33
_florent_same results with another hdmi cable?12:38
mithro_florent_: Okay, it seems to be dependent on cable and which input I'm using12:45
_florent_okay (at least we are progressing :)12:46
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tvCommitBot[streaming-system] micolous opened pull request #110: Update for LCA2016, more bootstrap (master...master)
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mithro_florent_: okay, so what I've figured out so far12:59
mithro_florent_: is we have invented a HDMI cable quality tester :P12:59
_florent_ so with others cable it's OK?13:00
* seaLne wonders if thats why he has never got any inputs to work...13:00
mithro_florent_: I have 1 cable which works, and 5 which don't in varying degrees13:02
mithro_florent_: they all seem to work "marginally" as the the picture kind of works at the start of the frame and slowly gets out of sync13:03
cr1901_modernmithro: I got a frequency counter into the verilog code using MiSoC, but for some reason the code that's supposed to generate the addresses that are placed into C headers isn't doing so13:03
mithro_florent_: kind of "drifts" a bit13:03
cr1901_modernLooking into it now13:03
cr1901_modern_florent_: Did you create cpuif?13:03
_florent_did some change in it13:04
cr1901_modernHrm... cpuif isn't generating constants for my frequency counter, even though I subclasses AutoCSR and it appears in the Verilog output13:04
cr1901_modern(it == the freq counter module)13:04
_florent_can you share the code?13:05
_florent_for modules with autocsr, you cannot do: self.submodules += mymodule, you have to do self.submodules.mymodule = ...13:06
mithro_florent_: another interesting point13:08
cr1901_modernOh... well that might possibly explain it13:08
mithro_florent_: input 0 seems to be less reliable on *both* the Atlys and the Opsis13:08
cr1901_modernindeed I did the former13:08
_florent_I'm not able to see that, I probably have high quality cables :)13:09
cr1901_modern_florent_: That fixed it, thanks13:11
mithro_florent_: yeah, xfxf buys cheap cables ;-)13:16
xfxfmithro: actually if it's the stripey cables they weren't cheap at all13:17
mithro_florent_: so - its *really* weird that on the Atlys and the Opsis, both input 0 are having issues13:17
mithro_florent_: I'm going to check another Atlys board13:17
xfxfmithro: that said if different cables fixes this i'm happy to buy more13:18
_florent_mithro/xfxf: it's can also be the hdmi output of the camera that is not very good13:19
_florent_it will be interesting to test these cables with others video sources13:19
_florent_and really use validated cables with the hv3013:19
_florent_it will also be interesting to test teh XA20 with the "working" cables13:21
_florent_"I plug the XA20 into Tim's Digitech 2-way HDMI splitter, plug it into the Opsis, set video_mode to 10 (720p), power cycle the splitter/XA20, and now it works."13:23
_florent_can you do that also with the HV30?13:23
cr1901_modernWhy does CSR only use the LSByte of each 32-bit data word?13:32
mithrocr1901_modern: I was wondering WTF was going on there last night too13:32
mithrocr1901_modern: That confused the hell out of me13:32
cr1901_modernI guess it's to simplifying connections to a 32-bit CPU, but it feels like an utter waste of address space :P13:35
_florent_because CSR is 8 bits with used with csr_data_width=813:35
_florent_and it reduce ressource to have a 8bit bus13:35
mithro_florent_: okay, with the *best* cable I have here, the Atlys board works fine with the HV30 on input 1, but does not work at all with the HV30 on input 013:35
_florent_and with you splitter in between?13:35
cr1901_modernIn any case, I'm not reading any data back from the CSR bus... all zeros :(13:35
cr1901_modernso something's wrong13:35
_florent_HV30 camera --> splitter --> input0?13:36
mithro_florent_: I now have my computer connected to input 0 and not getting anything13:38
cr1901_modernIn any case, I have to break for now... be back later13:39
mithro_florent_: it detects the Atlys fine, but the Atlys doesn't see the computer13:39
mithro_florent_: input0 works fine on the Opsis from my laptop13:42
_florent_but input0 on13:44
_florent_input0 on atlys is not buffered right?13:44
_florent_I remember there is a limitation with this input, but I'm not able to remember it13:45
mithroinput0 on?13:48
_florent_not sure13:48
_florent_can you test build 414 on opsis?13:48
_florent_it it works with your setup I can merge it13:49
_florent_(it works here)13:49
tpbTitle: HDMI2USB-firmware-prebuilt/opsis_hdmi2usb-hdmi2usbsoc-opsis.bit at master · timvideos/HDMI2USB-firmware-prebuilt · GitHub (at
mithroinput0 on/off commands don't exist13:49
_florent_"input0 on atlys is not buffered right?"13:51
mithroI'm pretty sure it is? I think only the second output is not buffered13:54
_florent_ah ok13:55
mithro_florent_: but the production Opsis board isn't working with my laptop13:57
mithro_florent_: it's getting the weirdly corrupted input too13:58
_florent_but that's the old ones no?14:01
mithro_florent_: Looks like this ->
_florent_maybe we have a timing issue14:03
_florent_can you test
tpbTitle: HDMI2USB-firmware-prebuilt/opsis_hdmi2usb-hdmi2usbsoc-opsis.bit at master · timvideos/HDMI2USB-firmware-prebuilt · GitHub (at
mithro_florent_: I'm thinking so too14:03
_florent_but that's strange it's working with pre-production board and not with production boards14:04
mithro_florent_: Using the other input
mithro_florent_: "WARNING:Par:468 - Your design did not meet timing.  The following are some suggestions to assist you to meet timing in your design."14:07
mithro_florent_: TS_hdmi2usbsoc_crg_pll_5_14:08
mithro_florent_: this is on the firmware I'm using on the Atlys14:08
mithroPlacer: Placement generated during map.14:09
mithroRouting: Completed - No errors found.14:09
mithroTiming: Completed - 4 errors found.14:09
mithro_florent_: however, the Opsis doesn't have any issues14:10
mithro_florent_: okay, I need to test your serial thing on an Opsis right?14:11
_florent_this way we will be able to run the same bitstreams14:12
mithro_florent_: Did you see I merged seaLne's "make download-prebuilt" ?14:14
_florent_what is is doing?14:14
mithro_florent_: means you can download the travis built firmware14:14
_florent_ah ok cool14:15
mithro_florent_: UART is working for me on     git commit: 9ac8965527d26eb9f763080531cf7650f7cc794614:17
mithro_florent_: shall we merge it?14:19
_florent_it's working here too14:19
mithro_florent_: great14:20
_florent_so I'm going to merge it14:24
mithro_florent_, seaLne's download-prebuilt was how I tracked down the romboot failure to
tpbTitle: targets: Move common stuff in targets files to a common file. · timvideos/[email protected] · GitHub (at
_florent_yes that's really a good idea to have that!14:25
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tvCommitBot[streaming-system] mithro closed pull request #110: Update for LCA2016, more bootstrap (master...master)
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mithro_florent_: BTW If you have anything else which does rombooting, take a look at
tpbTitle: gateware/targets: Make firmware a real gateware object. · timvideos/[email protected] · GitHub (at
mithro_florent_: FYI, the Opsis production boards actually have a pin header on the SD card - so it is easy of other people to connect serial port there14:30
_florent_ok except understanding the strange behaviour on the hdmi inputs, what are the plans now?14:31
_florent_are you going to do some capture tests with the HV30?14:31
_florent_(or maybe sleep too...)14:31
mithro_florent_: I have no plans at the moment except helping figure out the issues with the HDMI inputs14:31
mithro_florent_: btw, did you get shipping notification from Crowd Supply about the prod board?14:32
_florent_I got the notification, but the board are not already there14:32
mithro_florent_: how long ago?14:33
_florent_let me check that14:33
mithro_florent_: would be interested to know if/when they might possibly turn up14:33
_florent_6 days ago14:33
mithroany idea how long shipping might take? :P14:34
mithroI would guess minimum 7, maximum 14?14:34
mithroso likely to turn up Friday next week just when its no longer useful :P14:34
_florent_but I don't understand why behaviour is not similare between pre-prod and prob boards14:35
_florent_was is re-routed?14:35
_florent_or are there some changes on hdmi input buffers?14:35
mithro_florent_: there should have only been minor changes to the HDMI (connecting the power supplies correctly)14:36
seaLnemy production opsis boards got to uk customs this morning14:38
seaLneso _florent_ might not be long either14:39
mithro_florent_: shall I try and see if I can drop the Atlys frequency to 50MHz from the 75MHz?14:43
_florent_yes if you want14:57
cr1901_modernback. Found a nice bug in my freq counter module that made it essentially wasted silicon. Let's see what happens now...15:02
cr1901_modernOkay, I now have something that works :D15:08
mithro_florent_: what are you looking into?15:15
_florent_nothing for now, others things15:15
mithro_florent_: Is there anything you can do regarding the hdmi inputs?15:16
_florent_since my hardware seems to be working fine that's a bit difficult15:17
_florent_on your side, it would be interesting to do a bisect with prebuild bitstream and a configuration that is not working correctly now15:17
mithro_florent_: is there any extra debugging we can add to gateware/hdmi_in/ || gateware/hdmi_in/ which would give insight into where things are going wrong / it is loosing sync?15:18
_florent_I'll look at that15:18
cr1901_modernmithro: I have a working frequency counter on my end. It's giving fairly accurate results, but something's a bit off15:20
cr1901_modernE.g. I'm feeding a 40MHz signal into one of the inputs. The frequency that's being read back is consistently 40040960 Hz15:21
cr1901_modernI mean, that's 0.1% error I think? But I would've expected 0% error15:22
mithro_florent_: question, why do the misoclib.soc.SoCs have a integrated_rom_size argument?15:22
mithro_florent_: is that for the bios?15:24
_florent_yes for the bios15:25
mithro_florent_: should the firmware ROM be read only?15:26
mithro_florent_: (doesn't it make a difference?)15:26
cr1901_modernI think creating a ROM on FPGA is just using a block RAM and not connecting the write signals15:27
mithro_florent_: also, why does the Atlys have 1024 FIFOs but the Opsis only 512? - is that just an oversight?15:30
_florent_IIRC it was needed because the Atlys have less DDR throughput15:30
mithro_florent_: that would increase the difficult in routing right?15:32
_florent_maybe but that's not sure (maybe 1024  fits in a single bram, if so then there is no difference between 512 and 1024)15:37
*** se6astian is now known as se6astian|away15:53
cr1901_modernmithro: First version of the patch. Try playing with this15:56
tpbTitle: HDMI2USB Frequency Counter Patch · GitHub (at
cr1901_modernI'm curious to see if you get the same 0.1% error that I do on one of your boards...15:57
mithrocr1901_modern: send a pull request?16:01
mithro_florent_: dropping the frequency of the Atlys board seems to have made things worse....16:05
cr1901_modernmithro: Not sure if I should do that right now b/c: A. Idk if there's a bug or not, and B. The code that I added to minispartan6 is a debug target that probably shouldn't actually be used by anyone else right now16:05
mithro_florent_: Timing: Completed - 17 errors found.16:05
cr1901_modernDo you want me to send a pull request anyway and we'll fix bugs/remove the debug code later?16:06
mithro_florent_: I added something to the ci to re-enable the debug print from the input16:09
tpbTitle: Ubuntu Pastebin (at
mithro_florent_: I'm not 100% sure how to read it - but it seems like the charsync is true but chansync doesn't appear to lock?16:11
mithroI assume the first 3 ph numbers are the phase adjustment of the rgb channels?16:13
mithroI would guess WER is some type of W??? Error Rate?16:16
mithro_florent_: this is what I'm seeing with the HV30 camera connected with my "good" cable ->
tpbTitle: Ubuntu Pastebin (at
mithro_florent_: okay, it seems like the PLL is getting lock, even when no signal is getting through16:25
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_florent_it seems WER counts errors in the transitions, but I'm not well aware of the lower layers of HDMI16:26
tpbTitle: Ubuntu Pastebin (at
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mithro_florent_: so, any ideas were we go from here?16:41
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mithroahh, WER == Word Error Rate16:45
mithro_florent_: is there any chance that the lm32 running at 50MHz is too slow at servicing the hdmi_in0_adjust_phase stuff?16:48
_florent_sorry mithro, I'm doing some administrative stuff17:03
_florent_first we should do a bisect to see if it was working before17:04
_florent_(because I don't think we saw that before on the atlys)17:04
_florent_it will maybe give use some indications17:05
mithro_florent_: you don't have an Atlys board any more, right?17:11
mithroGAH?! How can having *less* logic in your design cause *more* timing errors....17:12
_florent_I have it... but not working...17:12
_florent_ISE is sometimes a bit difficult to predict...17:12
mithro_florent_: I disabled the ethernet on the HDMI2USB target on the Atlys, I went from 2 timing errors to 12 :(17:13
mithroI probably need to got to sleep soon17:13
mithroit's 4am here...17:13
_florent_yes probably17:15
_florent_have a good night17:15
mithroNot yet, I'm trying another build17:15
mithroThe Atlys firmware does only take 5 minutes to report those errors now though...17:15
mithroso, with the current gateware the PLL doesn't get lock on input0 on the Atlys board at all17:20
mithroI'd really like to fix and then turn timing errors back on....17:21
tpbTitle: Fix CLOCK_DEDICATED_ROUTE disable on the HDMI outputs · Issue #191 · timvideos/HDMI2USB-misoc-firmware · GitHub (at
mithroinput1 is working fine17:22
mithroIt's clear in the error message that the timing failure is on input0's PLL I believe?17:22
_florent_the error is for the output no?17:24
mithro_florent_: oh you are correct - it is unrelated here to inputs17:25
_florent_mithro: best thing to do first is probably to test old bitstreams17:26
_florent_I'm pretty sure this was working before17:26
_florent_we probably introduced something that cause this17:26
mithro_florent_: problem seems to exist all the way back too Fri Oct 9 18:28:35 2015 +110017:46
mithro_florent_: then I start running out of prebuilt firmware to download17:47
_florent_so that's something that is quite old17:47
_florent_but I don't remember having these kind of issues at that time17:48
mithroI do remember Ryan / Carl having issues with one of the inputs17:49
mithroand us discovering something having to be done with the jumpers17:49
_florent_yes, you have the link?17:50
_florent_I did a capture17:50
_florent_CarlFK put it somewhere but I don't remember where exactly17:51
mithroWasn't that the SCL/SDA issue?17:51
_florent_yes I think17:53
_florent_what are you trying by the way? a computer or the HV30?17:54
mithroThe computer reliably detects the output it seems, it's the Atlys which isn't detecting the computer....17:54
tpbTitle: Atlys Cabling · timvideos/HDMI2USB Wiki · GitHub (at
mithro_florent_: a computer17:54
_florent_from what I remember, you did a presentation with the atlys capturing it17:57
mithroffs - it appears to be JP517:57
_florent_what is JP5?17:58
_florent_(don't remember what it's supposed to do)17:58
mithroApparently it pulls ~OE high, causing the input buffer to be enabled18:02
mithro_florent_: okay input0 is working perfectly with the camera and two cables I have tested18:15
_florent_ok cool18:16
mithro_florent_: zero WER on all channels18:16
_florent_time to stop and go to sleep probably :)18:16
mithroinput1 is also working on this Atlys18:17
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mithro_florent_: also zero WER18:17
_florent_now we will have to understand why one input does not seems to be working fine on opsis production18:17
mithro_florent_: the high WER rate here I think is key18:25
mithro_florent_: can you pull my patches in onto your Opsis and see if you are getting any WER?18:27
tpbTitle: Adding HDMI debugging back in. by mithro · Pull Request #201 · timvideos/HDMI2USB-misoc-firmware · GitHub (at
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_florent_ok I'll test that18:27
mithroI'm going to get some sleep for now18:32
_florent_ok, good night18:44
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