Sunday, 2015-11-08

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mithromorning everyone01:28
mithroI assume all the people in the UK have gone to sleep?01:28
Bertl_oOprobably most of them :)01:57
mithroBertl_oO: so - the mapping on the Axiom side makes a difference to the mapping I choose on the TOFE side - hence why I was developing the schematics together01:58
mithroBertl_oO: ideally, I'd like TOFE<-HiLink->TOFE and TOFE<-HiLink->Axiom, TOFE<-HiLink->(Axiom expansion board), all to work using the same design02:00
Bertl_oOwell, I think the mapping on the axiom side doesn't really affect this, as long as the TOFE-Axiom adapter is sound02:01
Bertl_oOas I said before, I think it makes sense to have a 3 DP dual slot plugin on the axiom side, but don't let me stop you from designing your own single slot plugin02:03
mithroBertl_oO: From what I can see, you need 2xDP per axiom "slot", so I think we need 4 DP for the dual slot plugin?02:04
Bertl_oOwe don't have enough LVDS pairs for 2x DP per axiom slot02:04
Bertl_oO1xDP = 4LVDS pairs02:05
Bertl_oO1xslot = 6LVDS pairs02:05
Bertl_oO2xslot = 12LVDS pairs = 3xDP02:05
mithroBertl_oO: oh, in this the DP is for a cheap high speed compatible connector, not actually DP :)02:06
Bertl_oOyes, but still, we can't go to high speed on the GPIOs02:06
Bertl_oOso no point in having a separate connector (or lanes) for that02:06
Bertl_oOfurther there is no space for four DP connectors on the dual plugin module02:07
Bertl_oO3 miniDP will barely fit I guess02:07
mithro1 x DP gives you 4 x High speed LVDS pairs + 1 x Low speed LVDS pair (AUX) and 3 x IO pins (HPD, Config1, Config2)02:08
Bertl_oOI also don't see a problem with the 4xDP TOFE side here, as long as the DP high speed pairs connect to LVDS pairs02:08
mithroBertl_oO: The Axiom connector has 6 LVDS pairs + 8 x IO pins + SDA/SCL, right?02:09
Bertl_oOwe have 16 GPIO and two I2C, the 16 GPIO should be able to fill up 3x5 IOs on DP02:09
Bertl_oOso we can do 4xLVDS and 5 GPIO for each of the 3x mini DP02:10
mithroBertl_oO: btw is there any issue mounting connectors on both sides of the axiom board?02:11
Bertl_oOit complicates things with routing and layout (might not work with OSHpark) and it might also be problematic with future case designs ... i.e. I'd rather avoid it02:13
mithroBertl_oO: Hrm... You have 44 pins in total (for 2 interfaces), and I should have 45 pins available on the TOFE unless I've miscounted somehow02:15
Bertl_oOshould be fine then :)02:17
mithroBertl_oO: so, I think I've miscounted somewhere....02:17
Bertl_oOI also think you should have more02:17
Bertl_oOoff to bed now ... have a good one02:37
mithroBertl_oO: sleep well!02:37
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tumbleweed1024x769 doesn't work with chromebooks. Not suprised :P11:24
tumbleweed768 even11:24
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CarlFKtumbleweed: chromebook!!!16:41
CarlFKhook up, wait for chromebook to settle, hit reset button on Atlys16:41
CarlFKor "video_mode 8"  (or whatever 1024x768 is.. even if it is already set, there is some side effect that makes Jay's chromebook work with 720p16:42
tumbleweedCarlFK: hrm, then I have to remember whose chromebook it was16:44
tumbleweedI'll try16:44
CarlFKJay is a PS1 member.  this is what I found on his 1 machine.  it was before pyconza and there have been at least 1 firmware update that may have addressed it.  I have not meet up with Jay to test.16:45
tumbleweedmy laptop certainly doesn't cause that problem any more16:47
tumbleweedCarlFK: no, it sees 640x480, even though the chromebook says it's sending 1024x76816:52
tumbleweedif I switch to mode 0, it works :(16:52
CarlFKheh... that's slighty better.16:55
CarlFKlast time I checked Jays, input1: 860x316:56
CarlFK(or some such numbers that were just whack_16:56
tumbleweedso, apparently all HDMI are required to support [email protected], which is why when the chromebook is given a mode it won't support, it went back to it17:05
tumbleweed(I just had an HDMI engineer come over and talk to me)17:05
tumbleweedhe also suggests outputting a CEA-861 block
tpbTitle: Extended Display Identification Data - Wikipedia, the free encyclopedia (at
CarlFKtumbleweed: show him the source!!!  /me prays17:08
tumbleweedhe said "ah, that's only 128 bytes, you should send the CEA-861 block too"17:08
tumbleweedmatthew sweet, btw17:08
CarlFKmatthew sweet .. name rings a bell17:10
CarlFKxorg dev?17:10
tumbleweedyeah, rings a bell to me too, but I couldn't say what. lugradio, perhaps?17:10
tumbleweedhe said if we want to know more, we must buy a spec :P17:10
CarlFKI hear the firmware is easy to hack on17:11
CarlFKposting those two bits to a github issue17:25
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seaLnemithro: do you happen to know if the eeprom on the vmod-vga is just for identification and therefore replaced by the tofe one?17:31
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CarlFKrohitksingh: ^^^18:04
CarlFKrohitksingh: (11:28:38 AM) seaLne: mithro: do you happen to know if the eeprom on the vmod-vga is just for identification and therefore replaced by the tofe one?18:04
CarlFKrohitksingh: hi!18:04
rohitksinghCarkFK: hi!18:16
rohitksinghseaLne / CarlFK : yeah, that EEPROM is just for identification of correct expansion board plugged into the main that the mainboard can properly configure it automatically18:18
rohitksinghseaLne: but I don't understand what you mean by "replaced by TOFE one"?18:19
CarlFKrohitksingh: the VGA in/out are not connected to each other, right?  each is connected to the fpga, and it can read/write each independently ?18:20
CarlFK(this is all different from seaLne question)18:20
rohitksinghCalFK: no...VGA_out is directly connected to that it can act as a passthru...for example VGA output from a Laptop can go to the vmod-vga and from there you can still take a wire and connect it to a projector or something else18:22
rohitksinghwhile simultaneously capturing VGA data...18:23
rohitksinghI hope I could make it clearer18:23
CarlFKrohitksingh: thats fine, I get it.  same as the Twinpact18:24
rohitksinghCarlFK: I guess...I don't have much knowledge on Twinpact other than just seeing it when you had shown it during sprints! :)18:25
rohitksinghbut I guess it must be doing pass-through18:26
CarlFKit is18:26
CarlFKcan the fpga supply edid to the laptop vga?18:27
rohitksinghCarlFK: yes...vmod-vga has provisions for that... DDC (I2C) lines of VGA in & out have been connected to FPGA to enable edid control18:36
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