Friday, 2015-08-21

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shenkimithro: yo01:41
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mithroCarlFK: yay!12:18
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CarlFKmithro: what/where are the output files?13:10
mithroCarlFK: you should be able to do a "PROG=fpgalink make load-gateware" to get the firmware onto your Atlys board14:14
CarlFKmithro: that's a Rackspace VM - I need to get the files to the box that has my Atlys hooked up to it14:16
mithroCarlFK: rsync?14:20
CarlFKmithro: rsync what files?14:21
mithrothe build directory14:22
CarlFK[email protected]:~/HDMI2USB-misoc-firmware# du -sh build/14:25
CarlFK2.3G    build/14:25
CarlFKis that expected?14:25
mithroCarlFK: mine is about the same size14:39
mithroCarlFK: the actual bit files you program into the fpga are only a couple of kilobytes14:42
CarlFKmithro: what are the actual bit files14:44
mithroCarlFK: what do you mean?14:44
CarlFKwhat files do I need to rsync ?14:44
mithrothat build directory14:49
CarlFKI need all 2G of files?14:54
mithroNot really, but it is too complicated to do anything more sophisticated14:59
CarlFKhmm15:10
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mithrohey _florent_15:31
mithroCarlFK: I guess you could sshfs mount it or something?15:32
_florent_hi15:32
CarlFKmithro: isn't there a git repo of firmware?15:32
CarlFKhttps://github.com/timvideos/HDMI2USB-firmware-prebuilt15:32
tpbTitle: timvideos/HDMI2USB-firmware-prebuilt · GitHub (at github.com)15:32
mithroCarlFK: yes - but that is the old firmware15:32
CarlFKsame files?15:33
CarlFKer15:33
CarlFKsimilar files...15:33
_florent_mithro: the opsis board now has more ddr bandwidth than the atlys... :)15:43
mithro_florent_: !?!15:43
mithro_florent_: \o/15:43
mithroCarlFK: yes15:43
mithro_florent_: does that mean you have the phys working?15:44
_florent_maybe :) (I'm still doing tests)15:44
mithro_florent_: Any suggestions on the best way to store a file in the SPI flash and then emulate an EEPROM with the contents?15:46
_florent_can you explain what you want to do?15:47
_florent_if you just want to connect it to the SoC, you can use existing code from MiSoC15:47
mithro_florent_: The Cypress FX2 normally reads its firmware data from an I2C EEPROM. I want to store the firmware data (multiple versions) in the SPI flash used for the FPGA configuration instead.15:49
mithro_florent_: so the FPGA needs to emulate an I2C EEPROM with "contains" the contents of a file stored in the SPI flash15:49
mithro_florent_: and I saw that misoc already has stuff for reading stuff from the SPI flash15:50
mithroBrb15:51
_florent_for the spi flash, we can probably implement a SPI slave core with a small memory that we will fill from the SPI flash (the CPU can probably do that).15:58
_florent_the xfer is probably a linear burst, so we can reduce the size of the memory in the SPI slave core and read data from the SPI flash, store it in a fifo and expose it to the SPI slave code15:59
_florent_core15:59
mithro_florent_: yeah, I was thinking of something along those lines16:05
mithroThe SPI flash works up to 40MHz in theory, while the I2C is 400k, so I'm hoping there doesn't need to be much buffering16:06
mithroI guess I could start with just loading the file into blockram16:06
CarlFKmithro: there is 1 .bit file: [email protected]:~/HDMI2USB-misoc-firmware/build# find ./ -name "*.bit"16:08
CarlFK./misoc/build/atlys_hdmi2usb-hdmi2usbsoc-atlys.bit16:08
CarlFKand 5 .hex files. but only one in build: ./misoc/build/header.hex16:09
mithroCarlFK: did you run "make fx2-firmware" ?16:09
mithroCarlFK: You want to run "PROG=fpgalink make load-gateware && make load-fx2-firmware"16:10
CarlFKI did this: https://github.com/timvideos/HDMI2USB-misoc-firmware/blob/master/scripts/README.md16:10
tpbTitle: HDMI2USB-misoc-firmware/README.md at master · timvideos/HDMI2USB-misoc-firmware · GitHub (at github.com)16:10
CarlFKup to "Ensure board has the right pins set:"16:10
mithroCarlFK: see the load commands are next16:11
CarlFKI still don't have any files on the box the Atlys is plugged into16:11
CarlFK[email protected]:~/HDMI2USB-misoc-firmware/build#   <- rackspace VM16:11
mithroCarlFK: yes, my suggestion was to rsync the build directory back to your machine16:15
CarlFKmithro: I am trying to avoid pulling 2G of files over my cablemodem16:15
mithroCarlFK: you could regenerate them locally?16:16
CarlFKthat has never gone well for me16:26
CarlFKwhich is why I wanted a machine you could poke at when things go wrong16:26
mithroCarlFK: lets worry about that when you get to that problem?16:50
mithro_florent_: Where do you get the MAC address in liteeth?16:52
mithro_florent_: looks like it is hard coded in the target file?16:53
_florent_yes it's hardcoded for now, I should change that17:00
mithro_florent_: So, on the Opsis there is an I2C EEPROM which has the MAC address in it17:01
_florent_The MAC address is already programmed?17:03
mithro_florent_: yes, the EEPROM is a 24AA02E48 which has Pre-programmed Globally Unique, 48-bit or 64-bit Node Address in it17:04
mithroThe 24AA02XEXX is programmed at the factory with a globally unique node address stored in the upper half of the array and permanently write-protected. The remaining 1,024 bits are available for application use.17:06
mithro_florent_: doesn't look like the Atlys has anything similar from what I can see17:06
_florent_OK thanks, I use a similar eeprom in another design, so it should be be that long to integrate :)17:06
_florent_I'm going to do that, DDR3 is now working fine on the opsis :)17:07
mithro_florent_: \o/ \o/ \o/17:08
mithro_florent_: What bandwidth can we get on the Opsis board then?17:08
_florent_for now DDR40017:10
_florent_6.4Gbps17:10
mithro1024*768*32*60=1509Mbps - in theory that is enough for 2 streams in, 2 streams out without the colorspace conversion?17:13
_florent_yes, with colorspace conversion everything is working at [email protected]17:14
_florent_I will just have to do some changes around the encoder since it's now running at 50MHz and I'm not sure this is enough17:15
mithro_florent_: Any idea why misoc doesn't have some generic I2C stuff already?17:18
_florent_we are doing it in software :)17:20
mithro_florent_: oh :P17:21
mithroI guess writing C code is easier :P17:21
_florent_yes and generally I2C is not required to be fast17:22
_florent_I'm going to commit code for the eeprom17:22
mithro_florent_: okay17:23
_florent_if you want to test the opsis, the code is commited17:23
mithro"BOARD=opsis make gateware" right?17:24
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_florent_yes17:25
mithro_florent_: btw does the new DDR stuff also increase the Atlys bandwidth? The DDR2 there should go up to DDR400 too I though?17:25
_florent_yes, but I need to cleanup the code before using it no the atlys and eventually change some parameters in the controler (wr/rd phases and cmdphases)17:27
mithro_florent_: fair enough, seems like a low priority for now17:28
mithrogah, I think I need a holiday - I keep starting typing stuff on the command line and forgot what I was doing half way through17:28
_florent_:)17:30
_florent_ah, too bad my eeprom code was for a SPI eeprom...17:30
mithrogreat thing about standards, there are so many to choose from! :P17:32
mithroheading to the train station now, will be back tomorrow probably17:58
mithro_florent_: I succeeded in compiling the bitstream but ran out of time to try it actually on the board17:59
_florent_ok np18:00
mithro_florent_: I'm going to add some feature requests to the GitHub repo. Not expecting you to work on any of these. People keep asking if there is anything that they could work on and want to point them to.18:25
mithroThis train has wifi! :P19:49
mithro_florent_: could we automagically calculate the numbers in the csr map rather then having to update them all the time?20:03
_florent_yes probably, what we can also do is add some margin betwen base and others SoC20:04
mithro_florent_: there is an interesting hack which you can to to create an "iota" object which effectively evaluates to the next number in a sequence (based off the same idea as what go does)20:08
mithro_florent_: btw is the ethernet working at full gigabit speeds?20:08
mithro_florent_: I dunno if it is useful, but microchip provide a full verilog model for the eeprom on the opsis board20:09
_florent_actualy you can use MiniSoC with 1Gps Ethernet (but since data are generated by the CPU, you will not have 1Gpbs), but the HDMI2EthernetSoc only supports 100Mbps for now. (since sys_clk is < to 125MHz)20:13
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tvCommitBot[website] mithro pushed 7 new commits to master: http://git.io/vszdU22:39
tvCommitBotwebsite/master 9ee6df5 Tim 'mithro' Ansell: Fixing the title in the header.22:39
tvCommitBotwebsite/master 808f6c5 Tim 'mithro' Ansell: Updating _plugins based on changes in the hdmi2usb.tv repo.22:39
tvCommitBotwebsite/master 76d5849 Tim 'mithro' Ansell: Adding projects page.22:39
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tvCommitBot[website] mithro pushed 1 new commit to master: http://git.io/vszFh22:47
tvCommitBotwebsite/master ced04d5 Tim 'mithro' Ansell: Removing some stuff accidentally added.22:47
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tvCommitBot[website] mithro pushed 1 new commit to master: http://git.io/vszbI22:48
tvCommitBotwebsite/master 54ee1df Tim 'mithro' Ansell: Don't echo the github API key.22:48
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tvCommitBot[website] mithro pushed 1 new commit to master: http://git.io/vszN822:53
tvCommitBotwebsite/master ac7e349 Tim 'mithro' Ansell: Remove the stats+activities links for now.22:53
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CarlFKmithro: [email protected]:~/HDMI2USB-misoc-firmware$ PROG=fpgalink make load-gateware23:19
CarlFK23:19
CarlFK    from mibuild.tools import write_to_file23:19
CarlFKImportError: No module named 'mibuild'23:19
CarlFK[email protected]:~/HDMI2USB-misoc-firmware$ find ./ -name mibuild23:20
CarlFK./build/migen/mibuild23:20
CarlFK./build/migen/mibuild/tools.py23:21
CarlFKanyone here know how to upload the misoc firmware to the Atlys board?23:37

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