Monday, 2015-07-13

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tija_florent_ : Did you get the new HDMI2USB running on FPGA?12:45
_florent_hi tija12:45
tijahi _florent_12:46
mithro_florent_: sorry I haven't had a chance to respond to your email yet - did you make any independent progress?12:46
_florent_I'm still working in it but yes it seems to works :) (USB and ethernet)12:46
_florent_I'm working on the USB to remove all ip cores12:47
_florent_mithro: np12:47
_florent_tija: just for info (IIRC you worked on the JPEG encoder), I've found a bug in it when generates the JPEG header12:56
_florent_it does not handle the output_full signal12:57
_florent_by fixing this we can remove the large byteFIFOFPGA you have in the current design12:57
tijaAre you talking about the the bug mentioned on line 340.13:00
tpbTitle: HDMI2USB/jpg_uvc.vhd at master · timvideos/HDMI2USB · GitHub (at
_florent_yes probably13:05
tijaIf that is the bug, then it can be solved by disabling the clock to jpeg encoder when output_full is high. I guess that should solve the problem.13:12
_florent_yes but it's not very clean :)13:14
_florent_(imagine you have to do that for all cores...)13:14
mithroThe HDMI2USB prod board turned up today!13:32
mithroI never realised how much nicer having all the connectors on one side makes things13:34
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