Tuesday, 2015-06-23

*** tpb has joined #timvideos00:00
mithroMaZderMind: ping? I feel really bad about not having a really close look at the sync issue00:16
*** Niharika has quit IRC00:22
*** Niharika has joined #timvideos00:22
CarlFKmithro: how long will you be in Germany?00:41
*** 64MAC5YBM has quit IRC00:41
CarlFKif there is some TV sprinty stuff I might see about joining you00:41
*** 64MAC50LY has joined #timvideos00:43
*** 64MAC50LY has quit IRC01:04
*** 16WABBNFO has joined #timvideos01:06
*** CarlFK has quit IRC01:49
*** CarlFK has joined #timvideos02:10
*** ChanServ sets mode: +v CarlFK02:10
mithroCarlFK: the plan is definitely to be doing TimVideos hacking and meet both the Chaos Club VOC people and DebConf video team in person02:43
CarlFKmithro: I think it would be a little odd to hack on TV stuff while they are clicking away on DVswitch02:47
CarlFKand me flying to Germany to click DVswitch is silly02:47
CarlFKclick DVswitch and hack on TV for a few hours each night is only a little better02:48
mithroCarlFK: my plan is to hack on TV stuff for all of Chaos Comms Camp and then figure out DebConf when we get there.02:59
CarlFKyeah, Ill be in NYC during CCC.03:00
mithroCarlFK: I'm not planning on participating in the actual A/V recording except if we have a non-DVSwitch system running03:00
CarlFKI hope you can keep from getting sucked in03:01
CarlFKI guess they are only doing 2 rooms, they should have plenty of help, so maybe.03:01
mithroCarlFK: we'll see03:01
*** 16WABBNFO has quit IRC03:28
*** 7GHAAI47W has joined #timvideos03:30
*** hyades has joined #timvideos03:31
MaZderMindmithro: no worries, i have put it aside to finish the remaining voctomix things, like the gui, documentation etc.05:36
MaZderMindif it dowsn't happen earlier, the camp is a good place to work on that one remaining issue05:37
MaZderMindCarlFK: we can implement the record-cut-button there ;)05:39
MaZderMindah - now i understand - we will habe blackmagic hardware mixers for the lecture rooms snd angles (helpers) to operate them05:40
MaZderMindthe voc-village will focus in postprocessing (not much to do), hacking snd having a party05:40
MaZderMindmithro: no dvswitch, all hardware mixers ;) nevertheless we have staff to operate them05:41
mithroMaZderMind: I think CarlFK was talking about DebConf I think05:42
MaZderMindhm kk ^^05:42
CarlFKmithro: I don't care where he implements the button :p05:42
mithroI think, I think :P05:42
* mithro is waiting for a dental appointment, not looking forward to it :(05:42
CarlFKI'll be in NYC for sure and flying to DC the next day seems a little much05:43
mithroMaZderMind: snd? s/snd/and/ ?05:43
MaZderMindtyping on my smartphone into an ssh terminal05:46
*** 7GHAAI47W has quit IRC07:16
*** 64MAC52VY has joined #timvideos07:18
mithroMaZderMind: no worries, I wasn't sure if you where abbreviated sound to snd or something else07:18
*** 64MAC52VY has quit IRC07:39
*** 17SACV2B9 has joined #timvideos07:41
*** 17SACV2B9 has quit IRC07:42
*** 5EXABIRTX has joined #timvideos07:44
*** 5EXABIRTX has quit IRC07:59
*** 7GHAAI6UR has joined #timvideos08:00
*** sb0 has quit IRC08:06
*** 7GHAAI6UR has quit IRC08:54
*** 32NAB78RK has joined #timvideos08:56
*** sb0 has joined #timvideos09:04
*** sb0 has quit IRC09:12
*** 32NAB78RK has quit IRC10:00
*** scrollback has joined #timvideos10:02
*** tija has joined #timvideos11:30
*** sb0 has joined #timvideos11:37
tijamithro: migen can covert any module into synthesizable verilog. So why not convert everything to verilog and then add the jpeg encoder.11:38
mithrotija: I don't understand your statement?11:46
tijamithro: We have a open JPEG encoder in VHDL. We have reset of the component written in MIGEN. Instead of writing a JPEG encoder in MIGEN, MIGEN gives synthesizable verilog. So convert rest of the component to verilog add jpeg encoder to it. Do I make sense?11:48
mithromigen can use vhdl or verilog components11:49
mithroSee the misoc/extcores stuff11:50
mithrohrm, actually, it might only support verilog.....11:51
mithrotija: but cfelton's verilog version of the jpeg encoder should be pretty drop in11:52
tijamithro: hmm. The place where I am working, they code in C++ and then use Vivado HLS to convert everything to verilog. Other than dynamic memory allocation, almost all C++ constructs are valid including classes.11:54
mithrotija: that is a terrible idea :P11:55
tijamithro: There are open source substitute for Vivado HLS. http://legup.eecg.utoronto.ca/11:56
tpbTitle: High-Level Synthesis with LegUp (at legup.eecg.utoronto.ca)11:56
mithrotija: still a terrible idea :)11:56
mithrotija: why would you choose something as horrible as C++?11:57
tijamithro: C++ is horrible? It makes more stable system than python I heard :P11:58
tijaAnd is still better than VHDL11:58
mithrotija: there is a *huge* impedance mismatch between C++ and doing things in hardware11:59
mithroI'd much prefer the problems that come with a Python codebase then a large C++ codebase12:00
tijamithro: That is the whole idea of High level synthesis. Let the compiler search for parallelism, you just write the algorithm.12:00
mithrotija: yes, it's great in theory :)12:01
tpbTitle: stiggy87/ZynqBTC ยท GitHub (at github.com)12:01
tijaBitcoin miner written in HLS.12:01
mithroCompilers have gotten to the stage where they can often beat a human coder when transforming C++ code into ASM instructions these days12:03
mithro(for things like multimedia encoders / decoders for example)12:04
mithroIt's not unreasonable to think that C++ -> "gates" might reach a similar position 5->10 years from now12:04
mithroBut interestingly, JIT systems can sometimes beat compiled languages these days too12:06
mithrobecause they have more information about the system at the time they JIT so can apply better optimisations12:06
tijaWhat is JIT12:07
mithroJust-in-time compilation, what things like the JVM and PyPy do12:08
tijaThere is a similar paradigm in hardware called partial reconfiguration. A part of fpga can be programmed while running.12:10
mithrotija: anyway, back to something more practical12:12
mithrotija: I'd ask in the #m-labs channel how to integrate an external existing core into misoc12:13
tijamithro: hmm. But first let me get a feel of migen/misoc.12:15
mithrotija: okay, I thought you were talking about it because you had gotten the feel part done already12:16
tpbTitle: The new sd-bus API of systemd (at 0pointer.net)12:28
apsHeyo people. Long time :)12:51
*** scrollback has quit IRC13:09
*** scrollback6 has joined #timvideos13:12
mithrohey aps13:34
mithrohome time for me13:34
mithrobe back tomorrow13:34
apsmithro: good night. cya13:35
*** tija has quit IRC15:04
*** scrollback6 has quit IRC15:52
*** 1JTAAB60Y has joined #timvideos15:54
*** 1JTAAB60Y has quit IRC17:13
*** 6A4ACYVUU has joined #timvideos17:15
*** 6A4ACYVUU has quit IRC18:41
*** 5EXABIXMQ has joined #timvideos18:44
*** hyades has quit IRC22:00

Generated by irclog2html.py 2.13.1 by Marius Gedminas - find it at mg.pov.lt!