Tuesday, 2019-05-28

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mithromkurc: Looks like we missed attributes on port connections....03:27
mithroSee my further comments on https://github.com/SymbiFlow/yosys/pull/2503:28
tpbTitle: Support for attributes on parameters in Verilog by mkurc-ant · Pull Request #25 · SymbiFlow/yosys · GitHub (at github.com)03:28
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sf-slack2<mkurc> @mithro: You are right. I created an issue to track remaining attribute use cases in Yosys: https://github.com/SymbiFlow/yosys/issues/27. I will be updating this today.09:04
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sf-slack2<mkurc> @litghost: I filed an issue regarding my concerns about modeling FDCE with timings: https://github.com/SymbiFlow/symbiflow-arch-defs/issues/78817:25
tpbTitle: Modeling the FDCE with timing for VPR · Issue #788 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)17:25
sf-slack2<kgugala> @litghost dff split PR https://github.com/SymbiFlow/symbiflow-arch-defs/pull/78918:02
tpbTitle: xc7: dff: split dff into {FF|REG}_INIT and update timings by kgugala · Pull Request #789 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)18:02
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mithrohackerfoo: Did you see https://github.com/SymbiFlow/symbiflow-arch-defs/pull/778 ?20:59
hackerfoomithro: Yeah - I'll review it now.21:01
hackerfooAh, that was left over from before O5/O6 were split, I think.21:03
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hackerfoomithro: https://github.com/SymbiFlow/symbiflow-arch-defs/pull/66323:07
tpbTitle: Remodel RAM as dual-port fracturable by HackerFoo · Pull Request #663 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)23:07
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