Monday, 2019-05-13

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sf-slack2<acomodi> litghost, mithro: I have opened a PR to change the VTR mode selection mechanism in symbiflow ( and I have also updated the current PR in VTR mainline as well (
tpbTitle: mode selection: check modes while committing rt nets by acomodi · Pull Request #50 · SymbiFlow/vtr-verilog-to-routing · GitHub (at
sf-slack2<acomodi> litghost, mithro: I am running the titan benchmarks to get to see how better the new solution is w.r.t. the backtraced check of `Differing modes`13:47
sf-slack2<acomodi> I had troubles with running picosoc on HW using, but it turns out to be a timing issue, by adding an additional timing divider it now works14:45
sf-slack2<acomodi> *clock divider15:04
elmstiempo of day dobry15:51
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mithromkurc / kgugala: Morning?16:00
mithroMorning everyone...16:00
sf-slack2<mgielda> morning!16:00
mithromkurc: I think your FASM attribute stuff is potentially workable but we need to land first I think?16:01
tpbTitle: mux_gen + v2x: Support generating FASM annotations for muxes. by mithro · Pull Request #703 · SymbiFlow/symbiflow-arch-defs · GitHub (at
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mithroMeeting now, if your around afterwards I would like to sync up on the status of it16:05
sf-slack2<kgugala> @mithro: morning16:19
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sf-slack2<mkurc> Morning!17:02
sf-slack2<mkurc> @mithro Changes to muxgen and v2x are somewhat independent. I still need to make final fixes to make generated xmls pass the recently merged vpr test.17:04
mithromkurc: I did a pretty major refactor ot v2x to support the FASM values for muxgen output17:05
sf-slack2<mkurc> @mithro I see now that I still have some unresolved issues in discussion with @litghost about my implementation of the v2x FASM support. I hope I'll be able to resolve all that by tomorrow.17:22
mithromkurc: I think for now it might be a good idea to stop work on it until I can resolve conflicts with my pull request and yours17:23
sf-slack2<mkurc> @mithro Yep. But I see that my changes to the v2x are not so extensive. It might be easier to merge mine to yours.17:23
mithromkurc: Yes, I'll will do that17:24
mithromkurc: I want to get the pack pattern stuff working first17:24
sf-slack2<mkurc> @mithro Ok.17:24
mithromkurc: Could you maybe look at finishing off ?17:25
tpbTitle: WIP - utils/vlog: More tests from timing tutorial. by mithro · Pull Request #645 · SymbiFlow/symbiflow-arch-defs · GitHub (at
mithromkurc: Looks like most of the stuff needed for that is filling out the documentation and figuring out why the test fails?17:26
sf-slack2<mkurc> @mithro Ok, I can look into that.17:27
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mithrolitghost: So, I'm just looking at pack-pattern generation at the moment20:24
mithrolitghost: Were are the most complicated pack-patterns in the xc7 target?20:25
litghostmithro: I don't know if its the most complicated, but I'd start with the CE VCC and SR GND pack patterns20:25
litghostmithro: They are awful when written by hand, and I would love to move them to something better20:26
litghostmithro: Most of the other pack patterns aren't too bad20:26
tpbTitle: symbiflow-arch-defs/common_slice.pb_type.xml at master · SymbiFlow/symbiflow-arch-defs · GitHub (at
litghostmithro: Ideally the pack pattern would be generated inside of a generate statement20:26
litghostmithro: I was thinking as wire attributes, but I haven't really looked into it20:27
mithrolitghost: They track into ?20:28
tpbTitle: symbiflow-arch-defs/ff.pb_type.xml at master · SymbiFlow/symbiflow-arch-defs · GitHub (at
litghostmithro: Yep20:29
litghostmithro: Ideally we could annotate the sink and source of the pack pattern, and annotate the in between20:29
litghostmithro: But I'm open to other suggestions20:29
mithrolitghost: This pack pattern starts on the SR_GND output and ends on the Flip-Flop S input?20:31
litghostmithro: Or CE_VCC and ends at CE20:31
litghostmithro: Yes20:31
mithrolitghost: And there are multiple ones because of the multiple modes that the FF can be in?20:31
litghostmithro: There are 3 patterns per FF type, CE=VCC, SR=GND, and CE=VCC+SR=GND20:32
litghostmithro: Two dimensions, FF blackbox type (e.g. FDRE vs FDSE) and pack combination (CE=VCC / SR=GND / CE=VCC+SR=GND)20:32
litghostmithro: That last one (CE=VCC+SR=GND), it is unclear if that patterns is actually required, or whether the component parts are sufficient20:33
mithrolitghost: Probably as things can only be part of one pack-pattern...20:35
mithroBe back in 30mins, meeting20:35
litghostmithro: Okay, good luck20:35
mithrolitghost: There was something like "specialize carry chains" or similar somewhere?21:24
litghostmithro: Still is21:24
litghostmithro: I wanted to wait until we had timing results in to determine course of action on the specialization21:24
mithrolitghost: Ahh, it's not xc7 specific, its in utils/specialize_carrychains.py21:25
mithrolitghost: What does it do?21:25
litghostmithro: Ensures carry chain names are unique based on their parentage21:25
litghostmithro: So the SLICEM carry chain has a different pattern than the SLICEL carry chain21:25
litghostmithro: It is unclear that we actually want the carry chain in SLICEM to be used over the SLICEL, except when LUT-RAM's or SRL are required21:26
litghostmithro: Equiv tiles enable putting a SLICEL cluster at a SLICEM tile so we are limiting our resources21:27
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mithroDoes anyone need me to review anything?22:46
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litghostelms requested a second reviewer on
tpbTitle: Initial xc7 route timing import. by litghost · Pull Request #708 · SymbiFlow/symbiflow-arch-defs · GitHub (at
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