Thursday, 2019-01-24

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whatnickI will fork pjtrellis and work on a soc_fleafpga example00:01
whatnickwhat is the syntax of the LPF file ?00:03
whatnickwill open ocd will be okay push with this - ecp5-versa5g.cfg ?00:04
whatnickOkay I will be back ... off to lunch00:04
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* whatnick back01:38
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Ayanai got some job for fuzzing xadc in 35c3 but i got a bug in processing make02:50
tpbTitle: Traceback (most recent call last): File "/home/ayana/prjxray/fuzzers/033-mon- - (at
perillamintWhile running XADC fuzzer, fuzzer failed to fuzz specimen 00802:51
perillamintDoes anyone know how we can resolve this error?02:53
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OmniMancerWhat software is actually required to be installed to attempt to target a xilinx series 7 FPGA with open source tools?04:11
sorearit is not currently possible to target a series 7 with open source tools only04:18
sorearthere are a couple flows which use yosys in conjunction with ise or vivado04:18
OmniMancerThere is some work ongoing for open place and route for artix 7?04:22
sorearit WILL BE possible to use an entirely open flow04:35
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OmniMancerHow may one help with Artix 7 documentation work?12:26
soreardocumentation is mostly done, we need people to write place and route tools12:27
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OmniMancerIs there anything where small incremental contribution is possible?12:57
sorearuh, some other people here have long lists of those13:02
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OmniMancerAh, I shall hang around in here tomorrow then13:15
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litghostperillamint: That means none of the tags found a solution.  Are you sure that ADC configuration bits were being toggled?  Are you sure that tilegrid.json has a definition for the XADC tile?17:54
litghostOmniMancer: Depends on what you want to focus on.  Right now there is work in BRAM, MMCM, IOB and XADC documentation.  There is also a need to expand base addresses in tilegrid to include all tiles found in parts (python and tcl skills recommended).  On the place and route side, there are not architectural models for MMCM, IOB or XADC (python, xml and C++ skills  recommended).  There is also a need to write tests for both17:57
litghostprjxray and symbiflow17:57
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whatnickping daveshah, working out openocd profile for the LFE5U-25F22:27
daveshahBest is to look for an existing profile for the fleafpga22:27
sorearOmniMancer: litghost replied, check near [17:57]22:28
daveshahThe fleafpga uses a less common FTDI chip, iirc22:28
OmniMancerThanks sorear22:28
OmniMancerdaveshah: do you have any idea how different ECP3 series is from ECP5?22:28
daveshahBy no means identical22:29
daveshahI had a quick look at a bitstream once and I remember a few commands at least being different22:29
daveshahLogic tiles look a bit different in terms of routing too22:30
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whatnickdaveshah: we identified it from the schematic22:37
whatnickIt has a FT230XQ for USB serial/JTAG22:39
nats`hey plop guyz :)22:39
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whatnickhey nats`22:49
whatnicki am just getting back into IRC land ..22:50
whatnickbeen too long in twitter oceans22:50
whatnickworking on ECP5 FleaFpga22:50
whatnickHopefully will have picorv soc on it soon ...22:50
daveshahwhatnick: so you'll need to first see if openocd supports that chip22:54
daveshahIf it does, you'll need to create a config file with the correct pinout22:55
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