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se6astian | hi felix_ how is the hardware review status ? | 06:51 |
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felix_ | uh, haven't heard anything from him yet :/ | 14:30 |
se6astian | well can you check in with him | 14:31 |
felix_ | i'll try to reach him later | 14:33 |
se6astian | great | 14:34 |
felix_ | just woke up; had an intercontinental flight yesterday that was planned to happen on the day before, but the international terminals of frankfurt airport got locked down that day | 14:37 |
felix_ | i brought the apertus flyers and stickers i still had with me to put them in the sticker box at defcon :) | 14:38 |
se6astian | great | 14:38 |
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felix_ | rohit has a look at the design and liked it :) | 17:03 |
felix_ | i\ll have another look and go through the design checklist again | 17:04 |
felix_ | 17:17 < rohitksingh> felix_: Hi! finally got around to taking a look at your axiom sdi design. From my point-of-view (FPGA and MGT section), it is quite great. I see you have gone with DC coupling of GTP tx lines from FPGA to output | 17:04 |
felix_ | driver. | 17:04 |
felix_ | 17:17 < rohitksingh> felix_: I don't have much to add to that design, it is already quite beautifully designed and documented! good work! | 17:04 |
se6astian | great | 17:04 |
felix_ | yep. found it quite amusing that he just wrote me when i wanted to poke him again :) | 17:31 |
felix_ | i\ll update the footprint of the capacitor on the sdi connector to the kicad 5 version; that should have slightly better rf properties | 17:34 |
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felix_ | somehow i used the old footprints in the design, but i'll only change it in the places where it's possibly performance-relevant | 17:51 |
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*** se6astian is now known as se6astian|away | 21:43 | |
felix_ | i pushed a new version with the new capacitor footprints in the critical sdi paths | 23:43 |
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