Monday, 2019-07-22

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wtfuzzcan anyone recommend the most stable versions of OpenOCD and the or1k toolchain to use with mor1kx?15:23
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ZipCPUwtfuxx: Ask shorne16:50
wtfuzzshorne: any suggestions? The git master of openocd gives CRC errors. Ubuntu version of openocd (0.10.0) works much better, but I can't seem to get a simple newlib binary to run at all, single stepping just hangs gdb. I used to have this working well but lost my environment (I created a Terasic C5G fusesoc core and ported nuttx to openrisc)16:58
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ZipCPU(wtfuzz: He's on a different timezone ... you may need to wait a bit)17:31
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shornewtfuzz: hello, I have always been using git master21:19
shornebut... I admit I havent run it for a while21:20
shornewhich version of gdb, and which SoC setup are you using?21:20
wtfuzzinteresting. I get errors about CRC match bit when using master21:20
wtfuzzI actually made some progress, but I still can't single step or breakpoint21:21
shorneNote, I haven't probably use it in a year, I have been mailing doing iverilog sims and qemu for a while to get software stuff working21:21
wtfuzzgdb 7.11 is working21:21
wtfuzzwith openocd 0.10.0 from ubuntu 18.04 .deb21:22
shorneok, there are various part we maintain for the gdb to or1k debug pipeline21:22
shornegdb -> openocd -> jtag_if -> adv_debug_sys -> cpu_du -> cpu21:23
wtfuzzthe errors from openocd would indicate a mismatch with adv_debug_sys, but I'm using the latest21:23
shornethere were some recent adv_debug_sys change too21:23
wtfuzzusing altera_virtual_jtag -> adv_debug_sys -> mor1kx21:23
wtfuzzand wishbone master from adv_debug_sys21:24
shorneright, ok, let me try to reproduce21:25
wtfuzzhmm, I'm using olofk/adv_debug_sys which hasn't had an update in 2 years21:25
shornesorry, I will not have time this morning, just have 15 minutes before work21:25
shornewhich SoC setup are you using?21:25
shornea fusesoc core?21:25
wtfuzzI'm using a Terasic C5G (Cyclone V GX), using my own fusesoc core on github at wtfuzz/c5g21:26
shorneok, Ill try with our de0_nano setup21:27
wtfuzzI've at least got a basic newlib ELF blinking an LED now :)21:27
shornebut... debug should work21:27
wtfuzzyes, it should21:27
tpbTitle: GitHub - olofk/de0_nano (at
wtfuzzI do have some de0-nano boards, so I can build a system for one as well and try that if it helps21:28
shorneactually, I maybe am using my version here:
tpbTitle: GitHub - stffrdhrn/de0_nano: OpenRISC SOC for the De0 Nano FPGA dev board (at
wtfuzzwhich adv_debug_sys do you use?21:30
shorneI have set ::adv_debug_sys:3.1.021:32
shorneolof has 'adv_debug_sys', meaning just take the latest I suspect21:32
wtfuzzif I use the mdw command in openocd -> altera_virtual_jtag -> adv_debug_sys -> wishbone master -> RAM I still get the CRC errors, so it's something in openocd or it requires a different adv_debug_sys imo21:32
wtfuzzI even tried removing mor1kx completely from the design, just adv_debug_sys connected as wishbone master and on chip FPGA RAM. All kinds of errors. Older openocd works.21:34
shorneyes, I see, as I mentioned I havent upgraded openocd in years21:35
shorneI will have a look, I have to get going21:35
wtfuzzok, thanks for the help21:35
shorneCan you put an issue on mor1kx?21:36
wtfuzzyep, can do21:36
tpbTitle: Issues · openrisc/mor1kx · GitHub (at
shorneBy the way, we do have a google summer of code student working on just this issue21:42
shornei.e. ensuring we have continuous integration testing of the whole debug pipeline21:42
wtfuzzthat would be awesome :) it's currently a challenge to get a basic environment going21:44
wtfuzzI figured out why the newer versions of the toolchain/newlib were crashing. gcc generates ext instructions, which have to be enabled on mor1kx with .FEATURE_EXT          ("ENABLED"),23:08
wtfuzzbreakpoints and single stepping are working with GNU gdb (GDB)
wtfuzzI can now successfully load a newlib ELF, blink an LED and printf() to the UART on my Cyclone V GX23:10

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