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| Isma11 | Hello I am a litex newby trying to debug some gateware on the litex m2sdr. It is only connected via its PCIe port (m2 mounted). I followed the Use-Host-Bridge-to-control-debug-a-SoC in the wiki but I cannot find LitePCIeWishboneBridge module that is being called in the tuto. I looked for it for a long time in the litex source code without | 18:52 |
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| Isma11 | success. Can anyone help me with it ? | 18:52 |
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| Isma11 | Found it ! It's in litepcie.frontend.wishbone import LitePCIeWishboneBridge | 19:02 |
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