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| _florent_ | Thanks CarlFK, will watch it in the next days, this could also be useful to add this to the wiki | 09:33 |
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| sensille | _florent_: on spartan6 mac sram doesn't get synthesized to block ram. do you have any ideas why that could be? | 09:52 |
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| sensille | correction, the tx slots don't | 09:56 |
| sensille | The RAM <Mram_mem_8> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. | 09:57 |
| sensille | read looks synchronous to me, but it has 2 read ports | 10:02 |
| sensille | funny, if i explicitely use 2 memories with identical writes and split the reads, it implements them as BRAM and combines them | 10:19 |
| sensille | but that only works for one of the two tx buffers :-/ | 10:24 |
| sensille | on the other hand, one read port should be enough, it is either owned by software or by the mac | 10:25 |
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