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| cr1901 | _florent_: I forgot... what LiteX logic determines whether you get an spiflash region that determines whether you get an SPIFlash memory region? https://github.com/litex-hub/litex-boards/blob/e59d75f5936d7f8732e2c227d86a23285630d724/litex_boards/targets/digilent_arty.py#L108 | 04:58 |
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| cr1901 | wow, I messed up that question LOL | 04:58 |
| cr1901 | >what LiteX logic determines whether you get an spiflash region in the final SoC? For instance, icebreaker gets one b/c the BIOS can't fit reliably in the block RAMs, but Digilent Arty doesn't get one by default. | 04:59 |
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